Patent
1977-11-21
1980-06-24
Wojciechowicz, Edward J.
357 41, 357 25, 357 52, H01L 2976
Patent
active
042097967
ABSTRACT:
A charge-flow transistor having a source region and a drain region in a semiconductor substrate, a gate insulator, and a gapped gate electrode with a thin-film material having some electrical conductance disposed in the gap thereof. Metallization patterns are provided to reduce the detrimental effect of parasitic currents that appear within the transistor. There is disclosed also a plurality of such transistors in a single die with metallization to reduce any effect of parasitic currents between the transistors of the plurality.
REFERENCES:
patent: 4044373 (1977-08-01), Nomiya et al.
patent: 4062039 (1977-12-01), Nishimura
patent: 4065782 (1977-12-01), Gray
Massachusetts Institute of Technology
Shaw Robert
Smith, Jr. Arthur A.
Wojciechowicz Edward J.
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