Charge domain bit-serial multiplying digital-analog converter

Details Charge domain bit-serial multiplying digital-analog converter Charge domain bit-serial multiplying digital-analog converter

1995-06-01

1996-09-10

Mai, Tan V.

Boots, shoes, and leggings

G06J 100

Patent

active

055552005

ABSTRACT:
A single chip adaptive filtering system including an FIR filter and circuitry for calculating updated weighting coefficients for use in associated multiplying digital-to-analog converters. The adaptive FIR filter performs the convolution of a delayed and sampled input sequence to produce a filter output. Thereafter, an error term is determined by calculating the difference between the filter output and a reference signal which corresponds to a predetermined anticipated output of the filter. The error term is then applied to a least mean square (LMS) estimation algorithm for computing updated weighting coefficients to be used by the adaptive FIR filter.

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