Charge disturbance resistant logic circuits utilizing true and c

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307451, H03K 1716

Patent

active

048333476

ABSTRACT:
A cross-coupled load logic gate family which will keep voltage at a logic gate output below that of a switching threshold and a subsequent logic gate during a charge disturbance upset.

REFERENCES:
patent: 3980897 (1976-09-01), Arnold
patent: 4367420 (1983-01-01), Foss et al.
patent: 4507574 (1985-03-01), Seki et al.
patent: 4518875 (1985-05-01), Aytac
patent: 4569032 (1986-02-01), Lee
patent: 4570084 (1986-02-01), Griffin et al.

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