Charge detectors for CCD registers

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307221D, 307279, 307DIG3, H03K 520, G11C 1928, H03K 518, H03K 3353

Patent

active

040216829

ABSTRACT:
The invention comprises circuitry for detecting relatively small amounts of charge emitted from a CCD register. The circuit acts as a differential amplifier, differentiating between charge levels corresponding to logical zeros and logical ones and generates corresponding system level logic signals. A reference charge is developed by a self-tracking reference charge injector. Both the reference charge and the charge packet to be sensed are coupled to the differential amplifier via buffering diode-coupled transistors. The circuit provides for a REFRESH mode of operation, but may be modified to also allow for READ, WRITE or PARTIAL-WRITE modes of operation.

REFERENCES:
patent: 3758794 (1973-09-01), Kosonocky
patent: 3774176 (1973-11-01), Stein et al.
patent: 3882326 (1975-05-01), Kruggel
patent: 3891977 (1975-06-01), Amelio et al.
patent: 3892984 (1975-07-01), Stein
patent: 3955101 (1976-05-01), Amelio et al.
Suzuki et al., "A Static RAM with Normally-Off-Type Schottky Barrier FETs;" Dig. of Technical Papers of the 1973 IEEE Int'l Solid-State Circuits Conference; pp. 36-37 and 196; 2/14/1973.
Boyle et al., "Charge Coupled Semiconductor Devices;" Bell System Tech. Journal; pp. 587-593; 4/1970.
Gaensslen, "FET Diode Stored Charge Memory Cell;" IBM Tech. Discl. Bull.; vol. 11, No. 8, pp. 997-998; 1/1969.
Furman; "Sense Latch Circuit For Memory Cells;" IBM Tech. Discl. Bull.; vol. 16, No. 9, pp. 2792-2793; 2/1974.

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