Charge-coupled devices

Wave transmission lines and networks – Automatically controlled systems – With control of equalizer and/or delay network

Patent

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Details

307221D, 307293, 333 29, 357 13, 357 24, H03H 728, H03H 730, H01L 2990, H01L 2978

Patent

active

041258185

ABSTRACT:
A charge-coupled analogue delay line has a plurality of analogue storage locations, and a gating means, which may include charge-coupled shift register, for enabling input to and output from each of the storage locations in turn. The storage locations are formed on a semiconducting substrate and each has a diffused zener diode to act as a source of minority carriers and a priming electrode for drawing off and holding a charge of minority carriers from the zener diode. A sample-holding electrode, upon receipt of a gating signal by a gating electrode, receives from the priming electrode and holds a charge of minority carriers of magnitude indicative of the magnitude of the signal to be stored. An output electrode is arranged to transfer the charge held by the sample-holding electrode to a diffused output channel. Since signal samples in this delay line are transferred just once into a storage location and then out again they suffer less from degradation due to residual charges then is the case in conventional CCD delay lines in which samples are passed from location to location.

REFERENCES:
patent: 3546490 (1970-12-01), Sangster
patent: 3676711 (1972-07-01), Ahrons
patent: 3946247 (1976-03-01), Collins et al.
patent: 4037119 (1977-07-01), Schat

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