Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2001-04-05
2002-11-19
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S223000
Reexamination Certificate
active
06483132
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a charge coupled device (CCD) used for a solid state imaging device, and a method for fabricating the same.
(b) Description of the Related Art
A cell or a pixel of a frame-transfer CCD (FTCCD) used for an image sensor includes a sectional structure, a P-type impurity region
23
diffused at a higher temperature is formed on a N-type semiconductor substrate
11
. An N-type charge storage layer
13
sandwiched between a pair of isolation regions
12
is formed on the P-type layer
23
, and a plurality of electrodes formed by a conductive film
15
are arranged in a one-dimensional array on the charge storage layer
13
with an intervention of a dielectric film
14
therebetween.
In the conventional FTCCD, signal charge obtained by photoelectric conversion and stored in a charge storage layer is transferred by applying a specified driving voltage to the electrodes through the dielectric film
14
. Excess signal charge is discharged to a substrate by applying a specified voltage to the substrate, thereby preventing noise caused by the signal charge flowing to an adjacent cell. By applying pulse voltages to the substrate under the above situation, electrons are discharged to the substrate for controlling the amount of the stored charge, thereby conducting exposure control referred to as a substrate shutter or electron shutter.
Generally, in the solid state imaging device, the increase of the amount of the stored charge per cell or pixel is required for a higher dynamic range in addition to the higher photosensitivity of the pixel. In order to increase the amount of the stored charge, a technique has been developed in which the charge storage layer including a heavily doped and a lightly doped region underlying the heavily doped region, the technique being referred to as “Profiled Peristaltic CCD (PPCCD). The technique is described by J. T. Bosiers et. al., in the advanced publication of “Design Options for ¼”—FTCCD pixels, 1995 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors (April, 1995)”. As shown in
FIGS. 2A and 2B
, an N-type (heavily doped) impurity layer
24
is present on the top of the N-type (lightly doped) charge storage layer
13
in the PPCCD.
The PPCCD structure may be used for increasing the amount of the stored charge in the charge coupled device, wherein a shallower ion injection technique is used for increasing the impurity density of the top surface of the charge storage layer. However, the impurity distribution, similar to the Gauss distribution, formed by the ion implantation fluctuates the amount of the injection to provide non-uniform characteristics if the peak portion of the implantation varies in the thickness direction due to the different thicknesses of the dielectric film covering the charge storage layer
13
for preventing the contamination with heavy metal.
A problem exists also in the higher sensitivity range of the CCD. The effective photoelectric conversion region is restricted by the potential peak generated in a P-type semiconductor region when the signal charge is an electron as exemplified in a conventional FTCCD shown in FIG.
3
and in a conventional PPCCD shown in FIG.
4
. The signal charge generated by the photoelectric conversion at the area deeper than the potential peak flows to the substrate and is not utilized.
The deepening of the p-type semiconductor region for simply extending the effective photoelectric conversion region increases the potential for forming the depletion area (i.e. depletion potential) in the CCD, due to the deepening of the potential of the charge storage section. Accordingly, a power source voltage should be increased.
As shown in
FIG. 5
, the impurity distribution effective for deepening the potential peak intended to suppress the increase of the depletion potential of the CCD may be achieved by a P
−
layer or an almost intrinsic layer existing in the area between a surface N-type layer and a P-type layer in the substrate. However, the formation of the uniform almost-intrinsic region is impossible in the practical fabrication process, and the mass-production is impossible due to the lower yield.
SUMMARY OF THE INVENTION
In view of the foregoing, an object of the present invention is to provide a charge coupled device which is capable of satisfying the increase of a stored charge amount and a higher photosensitivity.
The present invention provides, in a first aspect thereof, a charge coupled device including: a substrate having a first conductivity type; a first semiconductor layer having a second conductivity type and formed on the substrate; a second semiconductor layer having the first conductivity type formed on the first semiconductor layer; a charge storage layer having the first conductivity type formed on the second semiconductor layer and sandwiched by a pair of isolation regions; an impurity region having the second conductivity type and disposed between the second semiconductor layer and the charge storage layer; a dielectric film formed on the charge storage layer and the isolation regions, and a plurality of electrodes arranged in a one-dimensional array on the dielectric film.
The present invention provides, in a second aspect thereof, a method for fabricating a charge coupled device including the steps of: forming a first mask pattern overlying a substrate having a first conductivity type; implanting, by using the first mask pattern, impurities having a second conductivity type into the substrate to form a first type-conductivity layer in the top part of the substrate and a second type-conductivity layer in the bottom part of the substrate; forming a second mask pattern overlying the substrate; implanting, by using the second mask pattern, impurities having the first conductivity type into the substrate to form a charge storage layer in the surface of the substrate; forming a third mask pattern overlying the substrate; implanting, by using the third mask pattern, impurities having the second conductivity type into the substrate to form an isolation region; forming a fourth mask pattern having an opening narrower than an opening of the second mask pattern; and implanting, by using the fourth mask pattern, impurities having the second conductivity type into the substrate to form an impurity region having the second conductivity type in the bottom part of the charge storage layer.
In accordance with the present invention, the increase of the amount of the charge storage and of the higher photosensitivity can be simultaneously satisfied. The fluctuation of the characteristics of the charge coupled device in accordance with the present invention is smaller than that of the conventional charge coupled device. Further, the method of the fabrication is less complicated than that for the conventional charge coupled device.
The above and other objects, features and advantages of the present invention will be more apparent from the following description.
REFERENCES:
patent: 4012758 (1977-03-01), Esser
patent: 4613895 (1986-09-01), Burkey et al.
patent: 4814848 (1989-03-01), Akimoto et al.
patent: 5233429 (1993-08-01), Jung
patent: 5962882 (1999-10-01), Sin
patent: 6369414 (2002-04-01), Kawakami
Munson Gene M.
NEC Corporation
Sughrue & Mion, PLLC
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