Charge-coupled device having a buffer electrode

Electrical pulse counters – pulse dividers – or shift registers: c – Charge transfer device – Particular input or output means

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377 62, 357 24, 365183, G11C 1928, G11C 1134, H01L 2978

Patent

active

046691006

ABSTRACT:
A series-parallel-series memory or other parallel-to-series CCD has charge-signals interlaced in alternate parallel channels 1a and 1b, and de-interlacing electrodes (19, 20, 21, 22) at the parallel-to-series transition. In order to avoid delay effects as a result of comb-shaped electrode configurations of the de-interlacing electrodes, and associated complex clock control, a narrow extra electrode (41) is provided between the de-interlacing electrodes and the series-output register (B). This electrode (41) may serve as a buffer electrode for each half row of information (from 1a or 1b) while the preceding half row (from 1b or 1a) is transported through the series output register.

REFERENCES:
patent: 3967254 (1976-06-01), Kosonocky et al.
patent: 4211936 (1980-07-01), Kosonocky et al.
patent: 4376897 (1983-03-01), Byrne et al.
patent: 4493060 (1985-01-01), Varshney

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