Charge coupled device circuit for use with a semiconductor Stora

Details Charge coupled device circuit for use with a semiconductor Stora Charge coupled device circuit for use with a semiconductor Stora

1975-06-25

1977-07-12

Curtis, Marshall M.

Communications: electrical

Digital comparator systems

340173FF, 357 24, G11C 1144

Patent

active

040357821

ABSTRACT:
A charge coupled device circuit for use with a semiconductor Storage Unit or a semiconductor Logical Unit which includes at least a charge coupled device serially connected with a transistor between a supply voltage line and a reference potential (such as ground). The charge coupled device is located between the supply voltage line and the transistor. A further embodiment of the present invention includes, in addition to the above, a second transistor connected to form a flip-flop with the first transistor. A second charge coupled device is connected serially to the second transistor and in turn to the reference potential. The charge coupled device of this invention includes at least three control electrodes. A first electrode of each charge coupled device are connected to each other and to a first pulse line. A third electrode of each charge coupled device are connected to each other and to a second pulse line. The second electrode of the first charge coupled device is connected to the gate electrode of the second transistor and to a first selection transistor. The second electrode of the second charge coupled device is connected to the gate electrode of the first transistor and to a second selection transistor. The transistors referred to are field effect transistors having source, drain and gate electrodes.
Another embodiment of the invention includes a storage capacitor connected between the midpoint of the serially connected charge coupled device and its associated transistor and ground.

REFERENCES:
patent: 3792322 (1974-02-01), Boyle et al.
Testing L.S.I. Memory Arrays Using On-Chip I/O Shift Register Latches, Balasubramanian et al., Dec. 1974, IBM Tech. Discl. Bull., vol. 17, No. 7, pp. 2019-2020.
Non-Volatile CCD Memory With MNOS Storage Capacitors, Goser et al., IEEE Journal of Solid State Circuits, vol. SC-9, No. 3, pp. 148-150, June 1974.

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