Electricity: battery or capacitor charging or discharging – Serially connected batteries or cells – Having variable number of cells or batteries in series
Reexamination Certificate
2001-03-23
2002-04-16
Tso, Edward H. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Serially connected batteries or cells
Having variable number of cells or batteries in series
C320S134000
Reexamination Certificate
active
06373225
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a charge circuit, and, more particularly, to a charge circuit, a charge and discharge circuit and a battery pack that are suitable for a secondary battery used in portable electronic apparatus, such as notebook-size personal computers.
FIG. 1
is a schematic circuit diagram of a prior art charge and discharge circuit
100
, which is conventionally built in a battery pack that is installed in a notebook-size personal computer. The function of the prior art circuit is described in the following to illustrate the limitations of conventional charge circuits. The charge and discharge circuit
100
controls charging and discharging of a battery
1
built in the battery pack. The battery
1
includes a plurality of (for example, three) lithium ion batteries
1
a
-
1
c
connected in series. The charge and discharge circuit
100
includes a balanced current setting circuit
4
and a charging and discharging control circuit
7
.
The positive electrode of the battery
1
is connected to a positive input/output terminal t
1
via a discharge control switch
2
including a P-channel MOS (PMOS) transistor and a charge control switch
3
including the PMOS transistor. The negative electrode of the battery
1
is connected to a negative input/output terminal t
2
. When charges are charged into the battery
1
, a direct current voltage is applied from a personal computer to the positive and negative input/output terminals t
1
, t
2
. When the charges of the battery
1
are discharged, driving power is supplied from the positive and negative input/output terminals t
1
, t
2
to the personal computer.
When charges are charged into the battery
1
, even if the discharge control switch
2
is turned off, a charge current is supplied from the personal computer to the battery
1
via the charge control switch
3
that is turned on and a parasitic diode D
2
of the discharge control switch
2
. When the charges of the battery
1
are discharged, even if the charge control switch
3
is turned off, a discharge current is supplied from the battery
1
to the personal computer via the discharge control switch
2
that is turned on and a parasitic diode D
3
of the charge control switch
3
.
The balanced current setting circuit
4
includes three charge current control circuits
4
a
-
4
c
connected in parallel to the lithium ion batteries
1
a
-
1
c
, respectively. The charge current control circuits
4
a
-
4
c
include resistors
5
a
-
5
c
and N-channel MOS (NMOS) transistors
6
a
-
6
c
, respectively. When each of the NMOS transistors
6
a
-
6
c
is turned on, charges of the corresponding lithium ion batteries
1
a
-
1
c
are discharged.
The charging and discharging control circuit
7
includes a cell voltage detection circuit
8
, an overcharge detection circuit
9
and an over discharge detection circuit
10
. The cell voltage detection circuit
8
includes three cell voltage amplifiers
8
a
-
8
c
that detect inter-terminal voltages (cell voltages) V
a
-V
c
of the lithium ion batteries
1
a
-
1
c
, respectively. Each of the cell voltage amplifiers is preferably an operational amplifier (op amp) having an amplification factor “
1
”.
Specifically, a non-inverting input terminal of the first cell voltage amplifier
8
a
is connected to the positive electrode of the first lithium ion battery
1
a
and the inverting input terminal thereof is connected to the negative electrode of the first lithium ion battery
1
a
(positive electrode of the second lithium ion battery
1
b
). The first cell voltage amplifier
8
a
detects the inter-terminal voltage (cell voltage) V
a
of the first lithium ion battery
1
a
and supplies the cell voltage V
a
to the overcharge detection circuit
9
.
A non-inverting input terminal of the second cell voltage amplifier
8
b
is connected to the positive electrode of the second lithium ion battery
1
b
and the inverting input terminal thereof is connected to the negative electrode of the second lithium ion battery
1
b
(positive electrode of the third lithium ion battery
1
c
). The second cell voltage amplifier
8
b
detects the inter-terminal voltage (cell voltage) V
b
of the second lithium ion battery
1
b
and supplies the cell voltage V
b
to the overcharge detection circuit
9
.
A non-inverting input terminal of the third cell voltage amplifier
8
c
is connected to the positive electrode of the third lithium ion battery
1
c
and the inverting input terminal thereof is connected to the negative electrode of the third lithium ion battery
1
c
. The third cell voltage amplifier
8
c
detects the inter-terminal voltage (cell voltage) V
c
of the third lithium ion battery
1
c
and supplies the cell voltage V
c
to the overcharge detection circuit
9
.
The overcharge detection circuit
9
includes three comparators
9
a
-
9
c
and an OR circuit
9
d
. The first cell voltage V
a
is supplied to a non-inverting input terminal of the first comparator
9
a
and a second reference voltage VTH is supplied to the non-inverting input terminal thereof. The first comparator
9
a
supplies a low-level detection signal to the OR circuit
9
d
when the first cell voltage V
a
is below the second reference voltage VTH. When the first cell voltage V
a
is equal to or greater than the second reference voltage VTH, a high-level detection signal is supplied to the OR circuit
9
d
. That is, the first comparator
9
a
supplies the high-level detection signal to the OR circuit
9
d
when the inter-terminal voltage V
a
of the first lithium ion battery
1
a
reaches the second reference voltage VTH.
The first comparator
9
a
has hysteresis and maintains the output of a high-level detection signal until the first cell voltage V
a
drops to a predetermined voltage VTL smaller than the second reference voltage VTH after the first cell voltage V
a
reaches a voltage equal to or greater than the second reference voltage VTH at one time.
The second cell voltage V
b
is supplied to a non-inverting input terminal of the second comparator
9
b
and the second reference voltage VTH is supplied to the non-inverting input terminal thereof. The second comparator
9
b
supplies a low-level detection signal to the OR circuit
9
d
when the second cell voltage V
b
is below the second reference voltage VTH. When the second cell voltage V
b
is equal to or greater than the second reference voltage VTH, a high-level detection signal is supplied to the OR circuit
9
d
. That is, the second comparator
9
b
supplies the high-level detection signal when the inter-terminal voltage V
b
of the second lithium ion battery
1
b
reaches the second reference voltage VTH.
The second comparator
9
b
has hysteresis and maintains the output of a high-level detection signal until the second cell voltage V
b
drops to the predetermined voltage VTL smaller than the second reference voltage VTH after the second cell voltage V
b
reaches a voltage equal to or greater than the second reference voltage VTH at one time.
The third cell voltage V
c
is supplied to a non-inverting input terminal of the third comparator
9
c
and the second reference voltage VTH is supplied to the non-inverting input terminal thereof. The third comparator
9
c
supplies a low-level detection signal to the OR circuit
9
d
when the third cell voltage V
c
is below the second reference voltage VTH. When the third cell voltage V
c
is equal to or greater than the second reference voltage VTH, a high level detection signal is supplied to the OR circuit
9
d
. That is, the third comparator
9
c
supplies the high-level detection signal to the OR circuit
9
d
when the inter-terminal voltage V
c
of the third lithium ion battery
1
c
reaches the second reference voltage VTH.
The third comparator
9
a
has hysteresis and maintains the output of a high-level detection signal until the third cell voltage V
c
drops to the predetermined voltage VTL smaller than the second reference voltage VTH after the third cell voltage V
c
reaches a voltage equal to or greater than the second reference volt
Haraguchi Akira
Matsumoto Takashi
Fujitsu Limited
Staas & Halsey , LLP
Tso Edward H.
LandOfFree
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