Charge cancellation technique for integrated circuit resistors

Details Charge cancellation technique for integrated circuit resistors Charge cancellation technique for integrated circuit resistors

1997-12-12

1999-12-21

Meier, Stephen D.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257532, H01L 2900

Patent

active

060052805

ABSTRACT:
An integrated circuit resistor (18) has a layout in which a first parasitic capacitance (26) exists between first portions of the resistor (18) and a first integrated circuit feature (34), and a second parasitic capacitance (28) exists between second portions of the resistor and a second integrated circuit feature (32). The resistor (18) may have, for example, a zigzag or serpentine configuration, with portions of each leg of the zigzag configuration over-lying the first and second integrated circuit features (34,32). The first and second integrated circuit features (34,32) are configured to produce substantially canceling charges on the first and second parasitic capacitances (26,28). The resistor may be defined by a doped semiconductor material, such as a polysilicon layer. The resistor may be used in many applications, such as a feedback resistor of an optoelectronic current-to-voltage converter (12).

REFERENCES:
patent: 4428066 (1984-01-01), Kihara et al.
patent: 4904951 (1990-02-01), Molina et al.
patent: 5107322 (1992-04-01), Kimura
patent: 5214497 (1993-05-01), Nanba et al.
patent: 5493254 (1996-02-01), Fairgrieve

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