Charge and/or discharge circuit, and carrier detector...

Electricity: battery or capacitor charging or discharging – Capacitor charging or discharging

Reexamination Certificate

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Reexamination Certificate

active

06677732

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to circuits for charging and/or discharging a capacitor with a constant current, such as a charge/discharge circuit that produces a carrier detection level, for use in receivers for IR remote controllers or in demodulators for demodulating a carrier signal and the like. The invention also relates to carrier detector circuits using such circuits.
BACKGROUND OF THE INVENTION
Miniaturization of receivers for IR remote controllers has advanced to the degree where it is now possible to realize a receiver in a two-chip configuration, in which an external photodiode is connected to an IC chip. This down-sizing of the receiver has forced the capacitor, which is charged or discharged according to the presence or absence of a detected carrier to output a voltage of a carrier detection level, to have a significantly less capacity, so as to fit the size of the IC chip. Thus, there is a present need to accurately maintain a small charge/discharge current.
FIG. 5
is a block diagram showing an example of a structure of a receiver
1
for an IR remote controller. FIG.
6
(
a
) through FIG.
6
(
e
) are diagrams respectively showing waveforms from various parts of the receiver
1
. The receiver
1
operates to convert an IR transmitted code signal into a photocurrent signal Iin, as shown in FIG.
6
(
a
), through a photodiode
2
. The photocurrent signal Iin enters a receiver chip
3
, which is realized by an integrated circuit, and is demodulated therein to an output signal RXOUT as shown in FIG.
6
(
e
). The receiver
1
outputs the output signal RXOUT to various devices, such as a microcomputer that controls electrical devices. The IR signal is an ASK (Amplitude Shift Keying) signal that has been modulated by a predetermined carrier of around 30 kHz to 60 kHz.
In the receiver chip
3
, the photocurrent signal Iin, shown in FIG.
6
(
a
), is successively amplified through a first-stage amplifier (HA)
4
, a second-stage amplifier (2nd AMP)
5
, and a third-stage amplifier (3rd AMP)
6
. A band-pass filter (BPF)
7
, designated by the carrier frequency, extracts a carrier component, as shown by &agr;
1
in FIG.
6
(
b
), from the amplified photocurrent signal Iin. A detector circuit
8
of the following stage detects the carrier component by a carrier detection level Det as shown by &agr;
2
in FIG.
6
(
b
), and an integrating circuit
9
performs calculations of integration with respect to the carrier time, as shown by &agr;
11
in FIG.
6
(
d
). A hysterisis comparator
10
compares an integral Int, which is the output of the integrating circuit
9
, with a predetermined threshold level as shown by &agr;
12
in FIG.
6
(
d
), so as to decide whether or not the carrier is present. The hysterisis comparator
10
then outputs the result of judgment as the output signal RXOUT shown in FIG.
6
(
e
).
On the output side of the first-stage amplifier
4
is provided a low-pass filter
11
which detects a DC level of the photocurrent from a fluorescent lamp or the sunlight. The second-stage amplifier
5
of the following stage removes the DC level directly from the output of the first-stage amplifier
4
, so as to eliminate the influence of light from the fluorescent lamp or the sunlight. There is also provided an ABCC (Auto Bias Current Control) circuit
12
in connection with the first-stage amplifier
4
. The ABCC circuit
12
controls a DC bias of the first-stage amplifier
4
according to the output of the low-pass filter
11
. There is also provided an of trimming circuit
13
in connection with the band-pass filer
7
. The trimming circuit
13
operates to trim zener diodes (not shown), which are provided between terminals TRM
1
through TRM
5
extending from the junctions of resistance dividers (not shown), so as to adjust a center frequency of of the band-pass filer
7
.
FIG. 7
is an equivalent circuit diagram of the detector circuit
8
and the integrating circuit
9
. The detector circuit
8
and the integrating circuit
9
, together with the hysterisis comparator
10
, make up a carrier detector circuit. The detector circuit
8
generates carrier detection level Det from the output Sig of the band-pass filter
7
. The integrating circuit
9
compares the output Sig with the carrier detection level Det, so as to perform calculations of integration on the result of comparison.
The detector circuit
8
is realized by a detector
21
and a charge/discharge circuit
22
. The detector
21
detects groups of pulses of a target carrier frequency, as shown by &agr;
21
in FIG.
6
(
c
). The charge/discharge circuit
22
compares the output Vc
1
of the detector
21
with a reference voltage V
1
, so as to perform calculations of integration in Time ton, in which pulse groups are present, and in Time toff, in which the pulse groups are absent, which are decided according to the result of comparison. That is, the charge/discharge circuit
22
charges or discharges the capacitor (not shown) installed in the device, so as to find a carrier detection level Det that is in accordance with the input signal.
Therefore, the carrier detection level satisfies the following condition
t
on×
Ij=t
off×
If
  (1)
where Ij is the charge current and If is the discharge current.
Time ton and Time toff vary according to the carrier detection level. With increase in carrier detection level Det, Time ton becomes shorter and Time Toff becomes longer. That is, the carrier detection level is the level that satisfies Equation (1), i.e., the level at which the amount of stored charge and the amount of released charge are equal to each other. For example, when the charge current is equal to the discharge current, i.e., when Ij≈If, then ton≈toff from Equation (1), under which condition transmitted signals with up to 50% carrier can be received. Above 50%, the amount of stored charge becomes large and the carrier detection level Det is increased, with the result that the reception sensitivity becomes poor. Thus, signals whose carrier proportion exceeds 50% are regarded as noise, and the carrier is separated from the noise. The noise carrier of an inverter fluorescent lamp, which oscillates continuously, is close to 100%.
Meanwhile, the proportion of Time ton in a transmitted signal is called the duty ratio, which is expressed by the following Equation (2)
duty=
t
on/(
t
on+
t
off)=1/(1
+Ij/If
)  (2)
The transmitted signal (code) of an IR remote controller differs from one manufacturer to another, and a wide range of duty ratio, from 10% to 60%, is employed. In order to receive a transmitted signal with a high duty ratio, reception sensitivity needs to be maintained by limiting the increase of the carrier detection level Det by reducing the charge current Ij. However, this setting for receiving a high-duty-ratio signal also limits the increase of the carrier detection level for the noise carrier of the inverter fluorescent lamp, which makes it difficult to separate the carrier from the noise and may cause reception failure or malfunction. Further, in integrated circuits (ICs), the currents Ij and If need to take into account such factors as non-uniformity in process parameters or fluctuation of surrounding temperature, which need to be taken into consideration by the receivable duty ratio to satisfy the specification range of the duty ratio.
FIG. 8
shows a charge/discharge circuit
31
, which is a typical conventional example of the charge/discharge circuit
22
. The charge/discharge circuit
31
is realized by a capacitor c
2
, a comparator
32
of a small output current, and a buffer circuit
33
of a small input current. The configuration of
FIG. 8
is adapted so that the comparator
32
receives an inverted output Vc
1
−1
of a detector
21
, as shown in FIG.
6
(
c
), instead of directly receiving the output Vc
1
of the detector
21
.
In the comparator
32
, the bases of transistors qn
1
and qn
2
, which make up a transistor pair, receive the inverted output Vc
1
−1
and a reference

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