1988-07-26
1990-12-04
Smith, Jerry
Excavating
341 58, 341 94, 341100, 371 55, 375110, H03M 714, H03M 900, H04L 702
Patent
active
049759167
ABSTRACT:
A system for bit character synchronization of an 8/10 bit code being deserialized is provided by a deserializer with a skip bit function input used to move a character boundary one bit at a time, and 8/10 code error detector, a zero disparity character detector and skip pulse generator. After character sychronism is lost, the skip pulse generator is permitted to generate a skip pulse if the following sequence occurs: all bits of the old character boundary have been flushed through the logic circuits, at least one non-zero disparity character has been detected, and an 8/10 code error is detected. After character synchronism is re-acquired, then the skip pulse generator is no longer permitted to generate a skip pulse.
REFERENCES:
patent: 4366478 (1982-12-01), Masuda et al.
patent: 4486739 (1984-12-01), Franaszek et al.
U.S. patent application, S#07/114,178, filed 10/29/87, "Serializer/Deserializer Circuit".
IBM Technical Disclosure Bulletin, vol. 28, No. 12, May 1986, pp. 5577-5579, to L. Skarshinski, "Character Synchronization Method".
IBM Technical Disclosure Bulletin, vol. 19, No. 8, Jan. 1977, pp. 3139-3143, to Lynch et al., "Serial Channel to I/O Interface".
Miracle Gerald H.
Neuner Richard A.
Wilson Lee H.
Baker Stephen M.
International Business Machines - Corporation
Smith Jerry
Troike Robert L.
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