Character framing circuit

Details Character framing circuit Character framing circuit

1979-06-13

1981-08-18

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221R, 364900, H03K 1928, H03K 1500

Patent

active

042849535

ABSTRACT:
A digital logic circuit provides character framing for a continuous stream of synchronous serial data characters. The digital logic circuit includes a shift register arranged for serial loading and parallel unloading of the received serial data characters. The parallel unloading of a received character triggers control logic to force a control code prefix consisting of a series of logical "1"s with a trailing logical "0" into the individual shift register stages. Serial loading of the next serial data character results in successive shifts of the control code prefix through the shift register stages. Serial loading continues until the trailing logic "0" shifts into a "shift register full" stage and is detected by the control logic. Detection of a change of state in the "shift register full" stage causes parallel unloading of the received serial data character followed by another forcing of the control code prefix to reinitiate the parallel unloading sequence.

REFERENCES:
patent: 3051940 (1962-08-01), Fleckenstein
patent: 3251031 (1966-05-01), Bolton et al.
patent: 3543243 (1970-11-01), Nordquist
patent: 3575215 (1971-04-01), Boddy

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