Chaotic neural circuit and chaotic neural network using the same

Details Chaotic neural circuit and chaotic neural network using the same Chaotic neural circuit and chaotic neural network using the same

1995-01-19

1998-04-28

Moore, David K.

395 27, G06F 1518

Patent

active

057456550

ABSTRACT:
A mapping circuit includes a linear circuit for outputting a signal which is linearly changed with respect to its input, a non-linear circuit for outputting a signal which is non-linearly changed with respect to its input, and an adder for summing the output signals of the linear and non-linear circuits and an external input signal. A chaotic neuron circuit using the mapping circuit has a simple structure and more precise chaos characteristics. A chaotic neural network can thus be formed by the serial and/or parallel interconnection of a plurality of chaotic neuron circuits, wherein the weight of each neuron is controlled.

REFERENCES:
patent: 5235672 (1993-08-01), Carson
patent: 5448682 (1995-09-01), Chung et al.
patent: 5506795 (1996-04-01), Yamakawa
Shimizu et al., "An Electronic Circuit Model of Chaotic Neural Networks," Transactions of the Institute of Electronics Information and Communication Engineers, vol. J73A, issure 3, pp. 495-508, Tokyo, Mar. 1990.
Adachi et al., "Pattern Dynamics of Chaotic Neural Networks with Nearest Neighbor Couplings," Circuits and Systems, 1991 IEEE International Symposium, Apr. 1991.
Pham et al., "CMOS Digital Retina Chip with Multo-bit Neurons for Image Coding," Circuits and Systems, 1993 IEEE International Symposium, May 1993 .

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