Pulse or digital communications – Repeaters – Testing
Patent
1990-06-04
1991-11-05
Cangialosi, Salvatore
Pulse or digital communications
Repeaters
Testing
H04K 100
Patent
active
050635727
ABSTRACT:
A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limited product signals are totalized to give a resultant signal representative of the chip rate.
REFERENCES:
patent: 4199668 (1980-04-01), Scozzari
patent: 4203070 (1980-05-01), Bowles et al.
patent: 4203071 (1980-05-01), Bowles et al.
patent: 4217586 (1980-08-01), McGuffin
patent: 4222115 (1980-09-01), Cooper et al.
patent: 4647863 (1987-03-01), Skudera, Jr. et al.
patent: 4652817 (1987-03-01), Yarborough et al.
patent: 4821294 (1989-04-01), Thomas, Jr.
Leahy Ronald S.
Smith Patrick J.
Cangialosi Salvatore
Kozak Alfred W.
Starr Mark T.
Unisys Corporation
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