Channel unit transmission for removing false data bits in adjace

Details Channel unit transmission for removing false data bits in adjace Channel unit transmission for removing false data bits in adjace

1995-01-05

1996-11-26

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

H04J 316

Patent

active

055793207

ABSTRACT:
A bleedover prevention circuit prevents a low data value of the last bit of an occupied channel unit time slot from bleeding over into the first and second bit times of an unoccupied channel unit time slot of a channel bank, by forcing the data lead to a high logic level within a terminal portion of the last bit time of an occupied channel unit time slot. The terminal portion of the last bit time occurs within a time interval delayed relative to a sampling clock edge, so that it does not detrimentally impact the validity of the value of the last data bit. If the immediately succeeding channel time slot is unoccupied, driving the data lead high prior to the beginning of such unoccupied channel time slot will render immaterial whether the last data bit value of the occupied channel time slot is a `one` or a `zero`, and will serve to effectively overcome the relatively long charging time, that would otherwise be required to pull the data lead high if the last data bit value were a `zero`.

REFERENCES:
patent: 5111485 (1992-05-01), Serack

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