Channel-selection-type demultiplexing circuit

Details Channel-selection-type demultiplexing circuit Channel-selection-type demultiplexing circuit

1997-07-16

2000-03-07

Pham, Chi H.

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

370536, H04J 302

Patent

active

060349743

ABSTRACT:
The invention has the object of offering a channel-selection-type demultiplexing circuit which is capable of interchanging the time slots of demultiplexed signals when demultiplexing ultra-high-speed multi-channel multiplexed signal stream without expanding the scale of the circuits, and does not require the scale of the circuits to be expanded even if the speed of the transmission path increases. The invention is a channel-selection-type demultiplexing circuit capable of demultiplexing signals to a desired output port during bit demultiplexing, instead of simply demultiplexing the bits as in conventional devices, which performs bit demultiplexing based on a frequency division clock after selecting the bit signals to be demultiplexed to the desired output port from the N-channel multiplexed signal stream based on channel selection information.

REFERENCES:
patent: 5128940 (1992-07-01), Wakimoto
Abstract of Japanese Patent Application No. 1-212935 entitled "Multiplex Code Conversion System" (Aug. 25, 1989).

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