Channel hot-carrier page write

Details Channel hot-carrier page write Channel hot-carrier page write

1995-06-21

1996-12-31

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

36518512, 36518514, 36518526, 36518533, 36518905, 36523008, G11C 700

Patent

active

055900763

ABSTRACT:
Disclosed herein is a channel hot-carrier page write including an array of stacked gate flash EEPROM memory cells operating in a very low energy programming mode permitting page writing of 1024 bits within a 20-100 .mu.S programming interval. Internal programming voltage levels are derived from on-chip circuits, such as charge pumps, operated from a single +V.sub.CC source. In a preferred embodiment, a cache memory buffers data transfers between a computer bus and the page oriented storage array. In another embodiment, core doping is increased in the channel and drain regions to enhance hot carrier injection and to lower the programming drain voltage. The stacked floating gate structure is shown to exhibit a high programming efficiency in a range from 10.sup.-6 to 10.sup.-4 at drain voltages below 5.2 VDC. In another embodiment AC components of the programming current are minimized by precharging a common source line at the start of a programming cycle.

REFERENCES:
patent: 5042009 (1991-08-01), Kazerounian et al.
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5511020 (1996-04-01), Hu et al.

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