Channel charge compensation switch with first order process inde

Details Channel charge compensation switch with first order process inde Channel charge compensation switch with first order process inde

1981-10-29

1984-08-21

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307353, 307579, H03K 17687, H03K 1716

Patent

active

044672276

ABSTRACT:
In the present invention, channel charge compensation is achieved in a MOS switch comprising two MOSFETs connected in parallel and a compensating MOSFET placed on the semiconductive substrate in precise symmetry with the two switching FETs, each of the FETs being designed to have the same channel charge storing capacity. Accordingly, first order variations in oxide thickness or in gate width across the surface of the semiconductive substrate do not affect the accuracy with which channel charge is compensated in the invention. The compensating FET is switched in complementary fashion with the two switching FETs so that it absorbs one-half of the channel charge expelled from the switching FETs when they are turned off, thus preventing this charge from upsetting other components in the circuit such as precision storage capacitors connected to the switch.

REFERENCES:
patent: 4308468 (1981-12-01), Olson
patent: 4323798 (1982-04-01), Watkins
patent: 4393318 (1983-07-01), Takahashi et al.
Marshall, Jr., "Reduce Sampling Errors by Adding an RC Network to Your Sample-and-Hold", Electronic Design 5, pp. 68 and 70, 3/1/78.

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