Channel bus controller

Details Channel bus controller Channel bus controller

1977-03-28

1978-09-19

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 900

Patent

active

041158547

ABSTRACT:
The Channel Bus Controller (CBC) transfers information between groups of input/output channels and processor storage. Storage receives or dispenses two data words per access operation. Interfaces for transfers from the channel groups to the CBC are advantageously one word wide; since each output (fetch) request consists of a single request word. Information sent by each group is assembled into three-word units (a request word and zero, one or two data words) in a respective channel bus assembly register (CBAR). The assembled unit is passed from the CBAR to a respective area of an In Buffer array and from that array to storage. Zero filler words are inserted into unused data word positions. A channel request may be tagged to designate a transfer of four data words. If the transfer is an input the four data words are sent to the CBC with a single request word. The third and fourth data words are written in the CBAR over the first and second data words as (or after) the unit formed by the request and first and second data words is advanced to the In Buffer. The same request and the third and fourth data words are transferred as a second unit from the CBAR to the In Buffer. The low order bit in the address part of the request is inverted by the CBC to designate the "next" storage address. This saves time by eliminating a request unit transfer from the source channel group. Request transfers from a group are permitted when a vacancy exists either in the respective CBAR or in a respective area of the In Buffer. Outputs from storage (acknowledgments of data inputs and fetched/output data) are returned to the respective channel group via a respective area of an Out Buffer array. Returns to a group are ordered in the input sequence of respective requests to the CBC although the requests may be applied to storage in another sequence. Tags generated by the CBC are used to maintain the correct output order without delaying evacuation of the In Buffer. The area partitioning of the in and out buffer arrays provides balanced group access to storage and simplifies handling of group traffic. Channel identity information in the request words is looped through the buffer arrays and returned to the channel groups with respective outputs. This permits the CBC (and storage) to ignore channel origins of group traffic and thereby further simplifies handling of traffic.

REFERENCES:
patent: 3699530 (1972-10-01), Capowski et al.
patent: 3702462 (1972-11-01), Ewgland
patent: 3976477 (1976-08-01), Porter et al.
patent: 4017839 (1977-04-01), Calle et al.

Affiliated with

Also associated with

Rating

Channel bus controller does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Channel bus controller, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Channel bus controller will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2123058