Changing the meaning of a pre-decode bit in a cache memory depen

Details Changing the meaning of a pre-decode bit in a cache memory depen Changing the meaning of a pre-decode bit in a cache memory depen

1996-05-28

1998-06-02

Kim, Kenneth S.

395389, 395570, 395584, 395587, G06F 938

Patent

active

057614903

ABSTRACT:
A system for changing the meaning of a pre-decode branch field associated with an instruction in an instruction cache memory of a computer system compatible with multiple branch prediction modes. The system includes a pre-decode unit for decoding instructions from a main memory. The pre-decode unit sets a pre-decode branch field for each branch instruction according to a current branch prediction mode context at the time of pre-decoding. The branch instruction is then inserted into an instruction cache memory. An instruction fetch unit fetches a pre-decoded instruction from the instruction cache and further decodes the instruction. If the instruction is a branch, a branch prediction unit interprets the pre-decode branch field of the branch instruction and computes a predicted branch direction according to the current branch prediction mode and its defined branch prediction mode context. The fetched instruction is inserted into an instruction buffer pending execution by an execution unit. Each of the multiple branch prediction modes result in a different method of predicting a branch instruction direction. In addition, the meaning of a pre-decode branch field differs for each of the defined branch prediction mode contexts defined for each of the multiple branch prediction modes.

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