Changeover circuit in tape recorder

Details Changeover circuit in tape recorder Changeover circuit in tape recorder

1997-08-20

2001-02-06

Nguyen, Hoa T. (Department: 2753)

Dynamic magnetic information storage or retrieval

General recording or reproducing

Signal switching

C360S067000

Reexamination Certificate

active

06185060

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a changeover circuit in a tape recorder.
2. Description of the Related Art
In many cases, a home-use tape recorder has a single head used as a recording head and a reproducing head. A circuit arrangement for such a common use is shown in
FIG. 1
, for example.
More specifically, reference numeral
10
denotes a recording/reproducing head for a tape recorder, and reference numeral
20
denotes a recording/reproducing integrated circuit (IC). In this case, the IC
20
has a recording circuit and a reproducing circuit which are integrated in one chip IC as a whole. Reference numeral
21
denotes an output amplifier at the final stage of the recording circuit; a reproducing equalizer amplifier
22
at the first stage of the reproducing circuit; and, a changeover switch
23
for switching recording/reproducing.
The IC
20
has external connection terminals (pins) T
21
to T
24
. A power supply voltage VCC is applied to the terminal T
21
, and a capacitor C
51
for high-frequency peaking in a reproducing state is connected to the terminal T
22
. A bypass capacitor C
52
is connected to the terminal T
23
, and the terminal T
24
is grounded.
A voltage forming circuit
24
is arranged in the IC
20
. In the forming circuit
24
, a DC voltage VBIAS (=VCC/2) which is ½ the power supply voltage VCC of the terminal T
21
is generated. The voltage VBIAS is applied to the amplifiers
21
,
22
and so on as a reference or bias voltage thereof, and is output to the terminal T
23
.
Reference numeral
30
denotes an oscillation circuit for an AC bias in a recording state, and reference numeral
40
denotes a changeover circuit for switching a signal line between a recording state and a reproducing state. In this case, the oscillation circuit
30
has an oscillation transformer M
31
, and an oscillation capacitor C
31
is connected to the secondary coil L
31
in parallel. The changeover circuit
40
has switching transistors Q
41
and Q
42
and transistors Q
43
and Q
44
for driving the changeover circuit
40
. A voltage V
41
higher than the voltage VBIAS is applied to a terminal T
41
, and a switching signal S
42
which is set to “L” in a recording state and to “H” in a reproducing state is supplied to a terminal T
42
.
Since S
42
=“L” is set in a recording state, the transistor Q
44
is turned off to turn off the transistor Q
43
, thereby turning off the transistors Q
41
and Q
42
. That is, the transistors Q
41
and Q
42
are equivalently disconnected.
In addition, in the recording state, the changeover switch
23
is connected in the state shown in
FIG. 1
, and a recording audio signal is extracted from the output amplifier
21
. The audio signal is supplied to the head
10
through a signal line formed of the amplifier
21
, the changeover switch
23
, the terminal T
22
, the head
10
, the parallel circuit formed of the recording equalizer capacitor C
53
and a resistor R
51
, a parallel circuit formed of coil L
31
and the capacitor C
31
, the capacitor C
52
, the ground, and the terminal T
24
.
At this time, an AC bias signal is extracted from the coil L
31
of the transformer M
31
of the oscillation circuit
30
, and the AC bias signal is supplied to the head
10
through a signal line formed of the coil L
31
, the elements C
53
and R
51
, the head
10
, the capacitor C
51
, the ground, the capacitor C
52
, and the coil L
31
.
Therefore, the audio signal from the amplifier
21
is AC-bias-recorded on a tape (not shown).
Since S
42
=“H” is set in the reproducing state, the transistor Q
44
is turned on to turn on the transistor Q
43
, thereby turning on the transistors Q
41
and Q
42
. In the reproducing state, the changeover switch
23
is connected in a reverse state of the state shown in FIG.
1
.
Therefore, the lower end portion of the recording/reproducing head
10
in
FIG. 1
is connected to the IC
20
through a signal line formed of the head
10
, the transistor Q
41
, Q
42
, the capacitor C
52
, the ground, and the terminal T
24
in this order. For this reason, a reproducing signal from the head
10
is supplied to the amplifier
22
through a signal line constituted by the head
10
, the terminal T
22
, the changeover switch
23
, and the amplifier
22
.
Therefore, the reproducing signal from the head
10
is subjected to a reproducing equalization process or the like to be supplied to the circuit at the following stage.
In this manner, in the tape recorder shown
FIG. 1
, the head
10
is used as recording and reproducing heads by the changeover switch
40
.
Since a DC potential at the output terminal of the amplifier
21
and a DC potential at the input terminal of the amplifier
22
are generally set to VCC/2, a DC potential at the terminal T
22
is also set to VCC/2. However, the voltage VBIAS is output to the terminal T
23
, and VBIAS=VCC/2 is established. Though, even if the head
10
is directly connected to the terminal T
22
(even if a capacitor for cutting a DC current is not connected), no DC current flows in the head
10
.
In the above changeover circuit
40
, the transistors Q
41
and Q
42
are in an ON state during a reproducing process. However, when the ON resistances thereof are large, the transistors are easily affected by hum noise. For this reason, the ON resistance thereof must be decreased.
In order to decrease the ON resistances, transistors each having a large current amplification factor hFE are preferably used as the transistors Q
41
and Q
42
. The transistor having a large current amplification factor hFE is expensive, so that the cost of the tape recorder increases.
Therefore, a current I
40
flowing through the transistors Q
41
and Q
42
may be increased to decrease the ON resistances thereof.
The current I
40
flows from the terminal T
41
into the transistors Q
41
and Q
42
through the transistor Q
43
and respective resistors R
41
and R
42
. The current I
40
further flows from the transistors Q
41
and Q
42
into the IC
20
through the terminal T
23
to be a load on the voltage forming circuit
24
. At this time, the voltage forming circuit
24
is originally used to provide the reference voltage VBIAS to the internal circuits of the IC
20
, and is constituted without considering a current flowing thereinto from the terminal T
23
. Therefore, when the current I
40
flows into the terminal T
23
and its increases, the voltage VBIAS at the terminal T
23
rises.
When the voltage VBIAS rises, in the IC
20
, the operating points of the circuits
21
and
22
and the like using the voltage VBIAS as a reference voltage or a bias voltage are shifted, and hence malfunction occurs. Therefore, the ON resistances of the transistors Q
41
and Q
42
cannot be decreased by increasing the current I
40
.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problems.
Therefore, according to the present invention, there is provided a changeover switch having a signal terminal and a bias terminal. The signal terminal is connected to an IC whose DC potential is made equal to that of the bias terminal. The collector-emitter of a first switching transistor is connected between a signal line connected to the signal terminal and the bias terminal, a voltage for ON/OFF-controlling the first switching transistor is applied to the base of first switching transistor through a resistor, a separate resistor and the collector-emitter of a separate switching transistor are connected in series between the bias terminal and the ground, and the ON/OFF-controlling voltage is applied to the base of the above separate switching transistor to ON/OFF control the separate switching transistor similar to the first switching transistor.
Therefore, a current flowing into first switching transistor when the transistor is in an ON state bypasses through the separate transistor.


REFERENCES:
patent: 5170389 (1992-12-01), Numata et al.
patent: 5877911 (1999-03-01), Klaassen et al.
patent: 363250913 (1988-10-01), None
Kawamura, JP408

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