Chalcogenide memory cell with a plurality of chalcogenide electr

Active solid-state devices (e.g. – transistors – solid-state diode – Bulk effect device – Bulk effect switching in amorphous material

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257 4, 257 5, H01L 4500

Patent

active

057897581

ABSTRACT:
A chalcogenide memory cell with chalcogenide electrodes positioned on both sides of the active chalcogenide region of the memory cell. The chalcogenide memory cell includes upper and lower chalcogenide electrodes with a dielectric layer positioned therebetween. The dielectric layer includes an opening defining a pore. A volume of chalcogenide material formed integral to the upper chalcogenide electrode is contained within the pore. The upper and lower chalcogenide electrodes both have greater cross sectional areas than the pore.

REFERENCES:
patent: 4115872 (1978-09-01), Bluhm
patent: 4203123 (1980-05-01), Shanks
patent: 4809044 (1989-02-01), Pryor et al.
patent: 5166758 (1992-11-01), Ovshinsky et al.
patent: 5177567 (1993-01-01), Klersy et al.
patent: 5510629 (1996-04-01), Karpovich et al.

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