Chain-latch circuit achieving stable operations

Details Chain-latch circuit achieving stable operations Chain-latch circuit achieving stable operations

1998-05-04

2000-04-18

Hoang, Huan

Static information storage and retrieval

Addressing

Plural blocks or banks

36518905, 365239, G11C 800

Patent

active

060523263

ABSTRACT:
A semiconductor integrated circuit includes a circuit including a plurality of memory blocks connected in series and operating in synchronism with a clock signal, the circuit holding data in each of the memory blocks during a data-hold state and holding the data between adjacent ones of the memory blocks during a data-transition state. The semiconductor integrated circuit further includes a memory circuit inserted between at least two adjacent ones of the memory blocks and operating in synchronism with the clock signal, the memory circuit holding the data between the at least two adjacent ones of the memory blocks during the data-transition period.

REFERENCES:
patent: 4935902 (1990-06-01), Tatsuki
patent: 5644387 (1997-07-01), Oda et al.
patent: 5857005 (1999-01-01), Buckenmaier

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