Chain-connected shift register and programmable logic circuit wh

Details Chain-connected shift register and programmable logic circuit wh Chain-connected shift register and programmable logic circuit wh

1996-12-16

2000-01-25

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

377 81, G11C 1900

Patent

active

060185597

ABSTRACT:
A shift register having a plurality of circuit cells successively connected in a chain formation is proposed. Each of the circuit cells includes a first inversion gate, a first transmission gate, connected to an output of the first inversion gate, being switched by a clock, and a second inversion gate connected to an output of the first transmission gate. The circuit cell further includes a first P-channel transistor, connected between an output of the second inversion gate and an input of the first inversion gate, being switched by the clock, a second transmission gate, connected to the output of the second inversion gate, being switched by an inversion clock, and a second P-channel transistor, connected to the output of the first transmission gate, being switched by the inversion clock. In the shift register, the plurality of circuit cells are successively connected such that the input of the first inversion gate of the circuit cell is connected to an output of a second transmission gate of a former-stage circuit cell, and the output of the first inversion gate of the circuit cell is connected to an output of a second P-channel transistor of the former-stage circuit cell.

REFERENCES:
patent: 4975932 (1990-12-01), Matsushima et al.
patent: 5132993 (1992-07-01), Nishiura et al.
patent: 5159616 (1992-10-01), Douglas et al.

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