Ceramic capacitor with a grain boundary-insulated structure

Metal working – Barrier layer or semiconductor device making – Barrier layer device making

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Details

29 2542, 252520, 252521, 361311, 3613215, H01G 700, H01G 406

Patent

active

052680061

ABSTRACT:
A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure including the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying the mixed powder; forming raw sheets; printing a pattern of inner electrode paste on the surface of the raw sheets; calcinating the laminated body in air; sintering the laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering the edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to the edges, wherein: the starting material of mixed powder comprises a material of the composition Sr.sub.(1-x) Ba.sub.x TiO.sub.3 containing excess Ti to make a final molecular ratio of Ti to Sr.sub.(1-x) Ba.sub.x in the range of 0.95.ltoreq. Sr.sub.(1-x)Ba.sub.x /Ti< 1.00 (where x is in the range of 0< x.ltoreq. 0.3); a first component of at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.5, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3, or CeO.sub.2 ; a second component of Mn and Si converted into MnO.sub.2 and SiO.sub.2 respectively; and an optional third component of at least one or more kinds of the compounds selected from Na.sub.2 SiO.sub.3, NaAlO.sub.2, Li.sub.2 SiO.sub. 3, LiAlO.sub.2, and Al.sub.2 O.sub.3.

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