Centralized image responsive telephone time slot interchange sys

Details Centralized image responsive telephone time slot interchange sys Centralized image responsive telephone time slot interchange sys

1985-01-31

1987-08-18

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 96, 370 58, H04J 302

Patent

active

046882120

ABSTRACT:
A central processor scans a plurality of ports for the purpose of receiving data or signaling information from a peripheral acting as an information source or for transmitting information to a peripheral addressed to receive that information. The processor selectively stores that information as an image of selected conditions at each port peripheral. The transmission of information between peripherals is accomplished on a timed schedule from the centrally located processor which uses the stored image to monitor local conditions at each peripheral without the need to specifically address each peripheral. Additionally, peripherals are arranged in modules to permit simultaneous exchange of information between ports.

REFERENCES:
patent: 3723973 (1973-03-01), Kennedy
patent: 4187399 (1980-02-01), Maxfield et al.
patent: 4530090 (1985-07-01), Priamo et al.
patent: 4564937 (1986-01-01), Perry et al.
patent: 4595921 (1986-06-01), Wang et al.

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