Central processor unit for digital data processing system includ

Details Central processor unit for digital data processing system includ Central processor unit for digital data processing system includ

1987-02-24

1989-07-25

Heckler, Thomas M.

Boots, shoes, and leggings

3642391, 3642396, G06F 1300

Patent

active

048519910

ABSTRACT:
A processor for use in a digital data processing system including a main memory and a write buffer for buffering write data and associated addresses from the processor for storage in the storage locations identified by the associated addresses in the main memory. In response to selection occurances, such as a context switch, which cannot be detected outside of the processor, the processor asserts a signal which enables the write buffer to transfer all of its contents to the main memory. The write buffer, in turn, disables the processor while it is transferring data to the main memory.

REFERENCES:
patent: 3737861 (1973-06-01), O'Neill et al.
patent: 4439829 (1984-03-01), Tsiang
patent: 4500958 (1985-02-01), Manton et al.
patent: 4543628 (1985-09-01), Pomfret
patent: 4591973 (1986-05-01), Ferris, III et al.
Parallel Microprocessor I/O Operation, R. A. Smith et al., IBM Technical Disclosure Bulletin, vol. 22, No. 7, Dec. 1979.
Central Processor Retry, E. J. Annunziata et al., IBM Technical Disclosure Bulletin, vol. 26, No. 9, Feb. 1984.

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