Boots – shoes – and leggings
Patent
1990-08-24
1992-12-29
Shaw, Dale M.
Boots, shoes, and leggings
3642402, 364DIG1, 364231, G06F 1576
Patent
active
051758644
ABSTRACT:
In a line computer used for controlling a manufacturing line control system, in which a high speed CPU and low speed I/O devices are used, optimum bus timing for signal transmission is generated, which has sufficient time margin to adjust any speed differences between the high speed CPU and the low speed I/O devices. Also, the function of a calender clock is improved so that accurate timing is generated. Furthermore, the display memory in a CRT displaying controller is used effectively so that the number of memory elements is reduced. Moreover, the connection system between the CPU board and the I/O boards or floppy disk drives is improved so that abnormality of the peripheral equipment does not extend to the CPU board. Also, in the invention, a compiler type language, such as the C language, can coexist with an interprepter type language, such as the BASIC language.
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Sargent & Shoemaker, The IBM Personal Computer . . . , 1986, 84, pp. 240-242.
Inoue Ken-ichi
Ito Chiaki
Tairaku Hirokazu
Takimoto Kenji
Tanido Shigetoshi
Barry Lance L.
Kojima Moonray
Shaw Dale M.
Yokogawa Electric Corporation
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