Patent
1995-09-01
1996-10-01
Beausoliel, Jr., Robert W.
39518316, 3951831, G06F 1100
Patent
active
055617611
ABSTRACT:
A Central Processing Unit (CPU) debugging device and method therefor is disclosed which provides data entering and interrogating devices which will temporarily stop all CPU execution when desired by a user and allow a non-destructive intrusion into the contents of any of the CPU internal registers, state bits, and cache and local memories. After the desired CPU contents have been reviewed and subsequently altered or maintained by a user, the CPU execution may be resumed.
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Alexander Thomas
Evoy David R.
Hicok Gary D.
Kim Yongmin
Lehman Judson A.
Beausoliel, Jr. Robert W.
Palys Joseph E.
YLSI Technology, Inc.
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