Central error detecting circuit for FSK receiver

Details Central error detecting circuit for FSK receiver Central error detecting circuit for FSK receiver

1997-03-26

1999-09-07

Tse, Young T.

Pulse or digital communications

Receivers

Angle modulation

375317, 329300, H04L 2714

Patent

active

059498293

ABSTRACT:
A demodulated baseband signal of a bit synchronization signal which has been FSK modulated, because it was transmitted with a narrow frequency band, is usually in the form of a sine wave on which a DC drift is superposed. Since this DC offset will cause bias distortion for transmission codes, it is needed to detect this offset component at higher speed and with a simpler manner as soon as signal incoming occurs and to correct this. This invention attains this by providing a center error detecting circuit for an FSK signal receiver comprising: sampling means for sampling the bit synchronization signal of a demodulated FSK baseband signal by two sampling pulses separated mutually by the reciprocal of the transmission rate in bits per second; and means for finding the mean value of the two samples thus obtained, so as thereby to provide the DC center level of the baseband signal.

REFERENCES:
patent: 4318617 (1982-03-01), Orsen
patent: 4500837 (1985-02-01), Shuey et al.
patent: 5233312 (1993-08-01), Duft et al.
patent: 5436590 (1995-07-01), Simard et al.
patent: 5663989 (1997-09-01), Fobbester

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