1990-09-04
1991-06-18
James, Andrew J.
357 22, 357 40, 357 41, 357 45, 357 47, 357 65, 357 71, H01L 2980, H01L 2978, H01L 2710
Patent
active
050252968
ABSTRACT:
A FET structure has first and second active areas separated by an inactive area with a gate bus located thereon. Gate fingers extend from the gate bus between source and drain contacts on the active areas. Bridges extend over the gate bus and interconnect the source contacts.
REFERENCES:
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patent: 4152714 (1979-05-01), Hendrickson et al.
patent: 4684965 (1987-08-01), Tajima et al.
patent: 4701777 (1987-10-01), Takayama et al.
patent: 4807022 (1989-02-01), Kazior et al.
patent: 4845536 (1989-07-01), Heinecke et al.
patent: 4857981 (1989-08-01), Matsumoto et al.
Fullerton Craig L.
Seely Warren L.
Handy Robert M.
James Andrew J.
Jones Maurice J.
Motorola Inc.
Ngo Ngan Van
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