Pulse or digital communications – Receivers – Angle modulation
Reexamination Certificate
1998-01-16
2001-02-13
Pham, Chi H. (Department: 2731)
Pulse or digital communications
Receivers
Angle modulation
C455S337000, C329S300000
Reexamination Certificate
active
06188733
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a circuit constructing technique for constructing circuit means which detects any center frequency error in a demodulated base-band signal, in a packet FSK (Frequency Shift Keying) signal receiver which can be used in an AFC (Automatic Frequency Control) circuit for correcting a center frequency error of an IF (Inter Frequency) signal, a demodulated signal correcting circuit for correcting a bias distortion of a demodulated base-band signal with the base-band portion in itself, or the like.
BACKGROUND OF THE INVENTION
An FSK signal is a signal for carrying digital information in the form of its frequency modulation (“0” and “1” components of the information are transmitted at frequency f
0
and f
1
, respectively), and therefore if there is an error in the center frequency of the IF signal, a bias distortion is caused to be produced in the demodulated base-band signal. Accordingly, to avoid this, it is needed to carry out some correction by detecting an error of the center level of this base-band signal, that is a DC offset component and then either correcting a frequency error itself using AFC so that the DC offset component is eliminated from the base-band signal or correcting this DC offset using the base-band signal itself so that the DC offset component is eliminated therefrom. Moreover, in any case, they must have such a characteristic that they are not affected by the contents of transmission code. This means that, in case of the AFC, they must respond not to the frequencies of f
0
and f
1
of the signal under transmission, but to the center frequency thereof. If not so, when for example “1” of information is iteratively transmitted for a long time, the AFC is caused to be drawn to f
1
, so that a plenty of code errors are produced.
In order to cope with this, various AFC systems have been thought which are not sensitive to the contents of the code. In one of these systems, positive and negative peak values of a demodulated base-band signal are detected and held, and then the mean value of these held positive and negative peak values is sought, on the basis of which a center level error, that is a DC offset component is detected. The second system uses a bit synchronization signal in the demodulated base-band signal (comprising alternative repetition of “0” and “1” of information) positioned at the header portion of a packet, which bit synchronization signal has been transmitted usually in the form of a sine wave in the base band for the purpose of narrow frequency-band transmission. In this second system, any center level error is estimated on the basis of the oscillatory rule of this sine wave. The third system detects any DC offset component by comparing the demodulated base-band signal with a rectangular signal into which this demodulated base-band signal was shaped, after the demodulated base-band signal and shaped rectangular signal have been made equal in amplitude. However, in these system, it has been found that following problems arise. In the first system, since it needs to keep both the peak values held, held voltages would possibly start to be discharged in case where “0” or “1” is transmitted successively for a long time. Also, in the second system, since it is needed to hold the estimated center level error until the related packet will be completed, there would arise a problem relating to discharging of the held level as in the case of the first system, in case where a long packet is utilized. The third system which was proposed by the same inventor as in this application and published in the Gazette of Japanese Pre-publication No. 235954/1995 entitled “Demodulation Correcting Circuit for FSK Signal Receiver”, which is incorporated herein by reference, can avoid the problem of discharging in the above-mentioned first and second systems, but has been recently found that it has a following disadvantage.
FIG. 1
shows the principle on the basis of which any center error is detected in the system according to the Japanese Pre-publication No. 235954/1995. It should be appreciated that this view is modified somewhat with respect to the original view in order to make the explanation thereof more understandable. FIG.
1
(
a
) illustrates a circuit construction of the detecting part and FIG.
1
(
b
) output waveforms from various elements in the detecting part in FIG.
1
(
a
). In FIG.
1
(
a
), a frequency discriminator
1
receives at its input an input FSK signal from an IF (Intermediate Frequency) stage in an FSK signal receiver. The IF signal received by the frequency discriminator
1
is frequency detected thereby and output therefrom as a base-band signal. The demodulated base-band signal is applied both to a comparator
2
and a subtracter
3
. The comparator
2
has a comparison reference voltage of 0 volt and is set to make the amplitude of the input base-band signal and the amplitude of its output signal equal. FIG.
1
(
b
) shows the demodulated base-band signal waveform (
1
) which is input to the comparator
2
and the comparator output signal waveform (
2
), in case where the center error is zero. The subtracter
3
which receives the base-band signal waveform (
1
) and the comparator output signal waveform (
2
) at its positive and negative input, respectively, carries out the operation of subtraction, that is {the waveform (
1
) the waveform (
2
)}. In FIG.
1
(
b
), a waveform (
3
) identifies the output of the subtracter
3
in case where there is no center error. This signal is smoothed by a smoothing circuit
4
to provide a center error detected output signal. Accordingly, it can be understood from FIG.
1
(
a
) and (
b
) that in this system there is no influence of the contents of the transmission code thereon.
If a DC offset occurs due to a frequency error, the waveform (
1
) will shift in FIG.
1
(
b
) upward or downward depending upon the amount of such DC offset; accordingly, zero-cross points are changed. FIG.
1
(
c
) shows as an enlarged view a half-period portion of the sine wave which can be obtained at that time. Assuming that the amplitude of the waveforms (
1
) and (
2
) is 1, and the amount of offset is &agr;, the angle of phase at the zero-cross point can be expressed in the following equation:
π
2
+
sin
-
1
α
Also, in FIG.
1
(
c
) areas A, B, C and D are defined by respective portions shown by continuous or dotted oblique lines, and are expressed as follows:
area
A
=
α
(
π
2
+
sin
-
1
α
)
+
cos
(
sin
-
1
α
)
(
1
)
area
B
=
α
(
π
2
-
sin
-
1
α
)
+
cos
(
sin
-
1
α
)
(
2
)
area
C
=
π
2
+
sin
-
1
α
(
3
)
area
D
=
π
2
-
sin
-
1
α
(
4
)
To carry out the subtraction by means of the subtracting circuit
3
and the smooth by means of the smoothing circuit
4
corresponds to the operation for finding {(area A−area B)−(area C−area D)}. This result becomes an error signal and from the above equations (1) to (4) the value S thereof is as follows:
S=&agr;&pgr;−2 sin
−1
&agr;(in the case of &agr;=0~1) (5)
These equations can be utilized only when &agr; is within the range of 0~1. If &agr; is more than 1, S is given as follows:
S=&agr;−1(in the case of &agr;>1) (6)
In case where S is negative, S is equivalent to {(area C−area D)−(area A−area B)}, and therefore, the signs of the equations (5) and (6) are simply reversed and for positive and negative values of &agr;, the relationship of S becomes odd-symmetry. A curve S indicated by dotted line in
FIG. 2
identifies calculated values of S for values of &agr;>0. Since output S at the point of &agr;=1 becomes zero, this point reveals the fact that control is disabled, which results in the above-mentioned disadvantage of this third system. Therefore, it is needed to provide a control system which can avoid the occurr
General Research of Electronics Inc.
Pham Chi H.
Tran Khai
Trexler, Bushnell Giangiorgi, Blackstone & Marr, Ltd.
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