Center bond flip-chip semiconductor device and method of...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S121000, C438S124000, C438S125000, C438S126000, C438S613000

Reexamination Certificate

active

06518094

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to semiconductor chip packaging. More particularly, the present invention relates to a center bond flip-chip semiconductor device and a method for making it.
BACKGROUND OF THE INVENTION
Semiconductor device packaging techniques are well known. In some conventional packaged devices a die is attached to a carrier, and contacts of each are electrically connected. In one such packaged device, called a flip-chip device, a semiconductor chip is flipped and bonded with a carrier such that contacts of the chip face and bond to contacts of the carrier.
With reference to
FIGS. 1-3
, a conventional center bond flip-chip device
10
is shown including a die
30
and a carrier
11
fabricated from a flexible substrate
12
, a conductor layer
14
which includes a polyimide core
13
and a plurality of conductive traces
15
, and an elastomeric layer
16
. The flexible substrate
12
is formed of a material exhibiting high temperature stability as well as high mechanical rigidity. The substrate
12
may be a flexible tape, such as, for example, a polyimide tape. Two commercially available polyimide tapes, KAPTON® from E. I. DuPont Nemours and Company and UPILEX® from Ube Industries, Ltd., can be used to form the substrate
12
.
The elastomeric layer
16
includes a first portion
17
and a second portion
19
of generally equal size and separated by a gap
22
. The elastomeric layer
16
may be formed of a silicone or a silicone-modified epoxy.
The conductive traces
15
may be located within or on the polyimide core
13
in a variety of ways. One way, which is an addition method, is to build up the conductive traces
15
on the polyimide core
13
through electrolytic deposition. The electrolytic deposition may be accomplished with a mask, or if performed without a mask, a subsequent etching step may be employed to create the conductive traces
15
. Other suitable methods include sputter coating and laminating a sheet of conductive material, such as copper, and etching away excess copper to form the traces
15
.
The conductive traces
15
are each electrically connected to a solder ball
28
within an inset
26
. Although a single solder ball
28
is shown in
FIGS. 1-2
, it is to be understood that the number of solder balls
28
should correspond with the number of conductive traces
15
within the conductor layer
14
. The solder balls
28
are used to mount the flip-chip device
10
to a circuit board or other electrical structure (not shown).
A solder mask
18
is positioned on the conductor layer
14
within the gap
22
. As illustrated, the gap
22
is rectangularly shaped, although any configured gap will suffice as long as the solder mask
18
is not covered by the elastomeric material
16
.
The die
30
is shown in dotted line above the carrier
11
. In use, the die
30
is positioned on the elastomeric material
16
of the flip-chip carrier
11
. The flip-chip carrier
11
is electrically connected with the die
30
by way of suitable conductive connecting structures, such as, for example, solder balls
24
positioned within a gap
20
of the solder mask
18
. The solder balls
24
are in electrical connection with respective conductive traces
15
through a gap
20
in the solder mask
18
and with suitable contacts on the die
30
.
Conventional center bond flip-chip semiconductor devices of the type shown in
FIGS. 1-3
have several disadvantages. One is that the solder mask
18
on the carrier
11
has the large, unsupported central gap
20
in which a plurality of solder balls
24
are positioned. The lack of support in the large singular gap
20
allows movement of the solder balls
24
causing them to sometimes contact with one another. Further, the solder mask
18
is positioned at a distance (currently around 150 micrometers) from the elastomeric material
16
due to poor adhesion between the solder mask
18
and the elastomeric material
16
. As a consequence, a minimum possible size of the flip-chip device
10
is at least partly determined by the distance between the solder mask
18
and the elastomeric material
16
.
There is, therefore, a need for a center bond flip-chip semiconductor device design which alleviates to some extent these disadvantages.
SUMMARY OF THE INVENTION
The present invention provides a center bond flip-chip semiconductor carrier including a flexible substrate, a core material with a plurality of conductive traces positioned on the flexible substrate, and a die attach material formed on the layer of conductive material. The die attach material includes a plurality of pockets, each for confining an interconnect conductor, such as a solder ball, over a conductive trace.
The present invention further provides an electronic system including a processor-based system, a semiconductor die in electrical connection with the processor-based system, and a die carrier connected to the semiconductor die. The die carrier has a flexible substrate, a core material with a plurality of conductive traces positioned on the flexible substrate, and a die attach material formed on the layer of conductive material. The die attach material includes a plurality of pockets, each for confining an interconnect conductor, such as a solder ball, over a conductive trace.
The present invention further provides a method for making a carrier for a semiconductor device. The method includes the steps of forming a layer of elastomeric material over a layer of conductive material in the form of traces and forming at least one pocket in the layer of elastomeric material extending to a trace of the conductive material.
The present invention further provides a method for making a carrier for a semiconductor device. The method includes locating at least one conductive trace on a core material, forming a die attach material over the core material, and forming a plurality of pockets in the die attach material extending to the at least one conductive trace.
The foregoing and other advantages and features of the invention will be more readily understood from the following detailed description of the invention, which is provided in connection with the accompanying drawings.


REFERENCES:
patent: 5608265 (1997-03-01), Kitano et al.
patent: 6180881 (2001-01-01), Isaak

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