Cellular processor apparatus capable of performing floating poin

Details Cellular processor apparatus capable of performing floating poin Cellular processor apparatus capable of performing floating poin

1986-03-26

1988-10-25

Harkcom, Gary V.

Boots, shoes, and leggings

364200, G06F 738, G06F 1300

Patent

active

047808420

ABSTRACT:
A processor apparatus which is capable of performing floating point arithmetic. The processor apparatus includes a plurality of individual processing cells which are interconnected from left to right in a chain so that any of the processor cells can operate to receive a bit of any slice in a digital word. Each cell includes a memory which essentially is coupled via a multiplexer to an arithmetic logic unit, a controllable multiplier quotient store, a controllable loop path, and controllable status path device. Each of these devices are under control of a control mechanism which is included in the cell, and therefore each path can be connected to any other path via various multiplexers utilized in the circuitry. Essentially, each cell includes a multiport RAM, programmable logic arrays which implement the control logic plus path logic which provides the communication between neighboring cells. In order to command a particular 1-bit processor to perform as a particular bit in a floating point word, a multiplicity of slice types is defined. Hence the floating point implementation requires 15 slice types to handle all different combinations of bit operations that must be performed. The logic is such that defective 1-bit processors appear invisible so that data can flow across them without interference. The cell is a relatively unified structure whereby each cell can be thus commanded to perform a particular operation on a particular slice of a given word independent of the operation of any other cell.

REFERENCES:
patent: 4507748 (1985-03-01), Cotton
patent: 4546428 (1985-10-01), Morton
patent: 4580215 (1986-04-01), Morton

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