Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2011-03-15
2011-03-15
Kindred, Alford W (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
Reexamination Certificate
active
07908461
ABSTRACT:
A data processing system includes an associative memory device containing n-cells, each of the n-cells includes a processing circuit. A controller is utilized for issuing one of a plurality of instructions to the associative memory device, while a clock device is utilized for outputting a synchronizing clock signal comprised of a predetermined number of clock cycles per second. The clock device outputs the synchronizing clock signal to the associative memory device and the controller which globally communicates one of the plurality of instructions to all of the n-cells simultaneously, within one of the clock cycles.
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Stefan Gheorghe
Tomescu Dan
Allsearch Semi, LLC
Geib Benjamin P
Haverstock & Owens LLP
Kindred Alford W
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