Cellular base station having a high speed, high resolution...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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Details

C341S144000

Reexamination Certificate

active

06476746

ABSTRACT:

FIELD OF THE INVENTION
This invention pertains to cellular base station and more particularly to an cellular base station having a high speed and high resolution digital-to-analog conversion using the oversampling principle.
BACKGROUND OF THE INVENTION
Cellular base stations, located at the center or on the edge of a coverage region or cell, are fixed stations within a wireless communication system used for radio communication with mobile stations. They comprise numerous radio channels and include a transmitter and receiver antenna mounted on a tower. A typical cellular base station specification requires a 16-bit DAC with an output bandwidth of 200 MHz and a spurious-free dynamic range on the order of about 100 dB. Though cost and power limitations may not be as critical where base station usage is contemplated, high resolution operation using oversampling is nevertheless complicated at increased speed. In particular, for sampling rates of approximately 400M samples per second (Nyquist sampling of a signal band-limited to 200 MHz), performing digital-to-analog conversions in real time using oversampling becomes extremely difficult and consumes vast amounts of power. And, for high speed applications, trading resolution for increase in processing speed is not an option. Thus, there is a need for a cellular base station having a high speed, high resolution digital-to-analog conversion apparatus and method.
Digital-to-analog conversion refers to the process of converting discrete digital signals into a continuous-time range of analog signals. The conversion of analog signals to digital signals and vice versa is often used in order to interface real world systems, many of which monitor continuously varying analog signals, with digital systems that read, store, interpret, manipulate and otherwise process the discrete values of sampled analog signals.
Sigma-delta modulation (sometimes called “delta-sigma modulation”) provides a high resolution digital-to-analog conversion solution. It incorporates a noise-shaping technique whereby the noise of a quantizer (often 1-bit) operating at a frequency much greater than the bandwidth is moved to high frequencies not of interest in the output signal. A filter after the quantizer removes the out-of-band noise. The resulting system synthesizes a high resolution data converter, but is constructed from low resolution building blocks. Since sigma-delta DACs provide for oversampling digital to analog conversion through the sampling of signals at very high frequencies (i.e., sampling at rates much greater than the Nyquist rate), high signal-to-noise ratios are achieved. Thus, the combination of oversampling and noise shaping technologies may be implemented using a sigma-delta DAC in order to achieve high resolution without external trimming. A high speed and high resolution digital-to-analog conversion solution, however, does not presently exist. A good overview of the theory of sigma-delta modulation is given in “Oversampling Delta-Sigma Data Converters,” by Candy and Temes, IEEE Press, 1992. Examples of D/A converters utilizing delta-sigma modulation are given in U.S. Pat. Nos. 4,901,077; 5,079,551; 5,185,102; 5,313,205; 5,701,106; 5,712,635; 5,786,779; 5,920,273; and 5,952,947. The disclosures of the foregoing references are incorporated herein.
Specifically, sigma-delta DACs commonly include a front-end interpolator which receives digital input samples and increases the sampling rate (typically 64-256 times the input sample rate) of the digital input samples. Techniques for increasing the sample rate, generally called interpolation, are well understood by those skilled in the art. Most designs utilize several stages of increase. A sigma-delta modulator receives the higher frequency input samples from the interpolator and converts the samples to a lower resolution (typical one-bit), high frequency bit stream. Rather than spreading quantization noise uniformly over the frequency range from 0 to the sampling Nyquist frequency, the sigma delta modulator shapes the noise so that the majority of the noise falls into the very high frequencies above the Nyquist frequency. Thus, it effectively removes the noise from the lower frequency range which is of interest for the particular applications cited above.
An oversampling DAC which utilizes a second order sigma-delta quantizer and an analog low pass filter to convert the data from the sigma-delta quantizer to analog signal is a very effective device for low speed audio applications. This implementation, however, is inappropriate for high speed applications such as the cellar base station of the aforementioned criteria. In addition, this type of DAC has a relatively high output data transition rate, requiring higher power than is desirable. Moreover, considering oversampling interpolations on the order of n=256 for high sampling rates, such as the 400M samples/sec required for cellular base station applications, extreme clocking speeds (400 MHz×256) become a serious design obstacle.
Thus, there exists a need for an improved cellular base station having a DAC operable at higher speed than heretofore achievable which exploits the sigma-delta principle in a different way.
SUMMARY OF THE INVENTION
A digital cellular base station having minimum hardware requirements readily adapted to support high speed communication is disclosed herein. For providing a solution to the above described need, the cellular base station includes a digital signal processor base band processor and modulator, a high-speed, high resolution digital-to-analog converter, a first modulator, a second modulator and an antenna. An input signal couples to the digital signal base-band processing modulator to be processed. The high-speed, high resolution digital-to-analog converter couples to receive the processed signal and converts the signal into an analog one. The first and second modulators, respectively, receive and modulate the signal to two different speeds, a second and a third speed, respectively. Finally, the antenna couples to receive and transmit the signal at the third speed from the second modulator.
The high-speed, high resolution digital-to-signal processor includes a storage means for storing delta-sigma bit sequences corresponding to all possible values of a digital input coupled to a plurality of one-bit digital to analog converters. Each of the digital to analog converters are clocked by multi-phase clocks such that each phase applied to each one of the digital to analog converter is delayed with respect to a next one by the oversampling period, which is the Nyquist period divided by the number of predetermined interpolated samples. An analog summer is coupled to all the digital-to-analog converters for summing all the outputs from the plurality of digital to analog converters to generate an analog output. Incorporation of the high-speed, high resolution digital-to-analog converter reduces the amount of hardware necessary for cellular base-stations.


REFERENCES:
patent: 5008671 (1991-04-01), Tuthill
patent: 5442379 (1995-08-01), Bruce et al.
patent: 5592166 (1997-01-01), Wincn
patent: 5701106 (1997-12-01), Pikkarainen
patent: 6091715 (2000-07-01), Vucetic et al.
patent: 6310908 (2001-10-01), Reed et al.

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