Cellular array processor with variable nesting depth vector cont

Details Cellular array processor with variable nesting depth vector cont Cellular array processor with variable nesting depth vector cont

1988-05-09

1989-05-16

Clark, David L.

Boots, shoes, and leggings

G06F 1516

Patent

active

048315192

ABSTRACT:
A processor cell that may be integrated with a multiplicity of dynamically reconfigurable 16-bit slices to enable and disable arbitrary collections of processing elements under software control according to the data being operating upon is provided. The structure allows a collection of word sizes to be defined and then for certain processing elements to be enabled or disabled according to the data that they are operating upon. A slave mechanism is described wherein for words comprised of a multiplicity of slices the most significant slice is in control and the other slices are slaved or forced to go along with the operation of the most significant slice. This slaving is obtained automatically without the necessity to explicitly coordinate the operation of the multiplicity of slices cooperated together to form a word. The cell includes a Find and Lose operation wherein a scaler control means selects one from a multiplicity of processors satisfying some condition. The apparatus finds the first cell satisfying some condition and operates upon that processor cell when the operation upon that processor is completed, the apparatus looses that processor and then goes on to the next processor satisfying the condition and so on.

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