Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent
1993-09-17
1996-02-13
O'Shea, Sandra L.
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
371 1, H04L 700, G06K 504
Patent
active
054917280
ABSTRACT:
A cell resequencing system is provided for a resequencing section (RS) of a telecommunication network through which cells of communications are transmitted. The resequencing section includes cell switching networks (SN2) having inlets (I2l/I2n/I2N) coupled to inputs (S1l/S1n/S1N) and outlets (N2l/N2m/N2M). The cells are subjected to a first variable time delay. The cell resequencing system (C1l/C1n/C1N, CK1; R2l/R2m/R2M, CK2) includes latches (R2l/R2m/R2M) coupled between the outlets (N2l/N2m/N2M) and the outputs (S2l/S2m/S2M) to subject the cells to a second variable time delay chosen for each cell so the sum of the first and second variable time delay is substantially equal to a predetermined constant time value, which determines the size of the latches (R2l/R2m/R2M). The resequencing section (RS) has two inputs (S1l, S1n/S1N) each coupled to a distinct inlet (I2l/I2n/I2 N) via a distinct transmission link (TLl/TLn/TLN). The cells are subjected to at least a fixed transfer delay (TD) during their transfer from the input (S1l/S1n/S1N) to the outlet (N2l/N2m/N2M). The fixed transfer delay forms part of the first variable time delay. The minimum size of the latches (R2l/R2m/R2M) is determined by a difference between a predetermined constant time value and the fixed transfer delay (TD).
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IEEE Journal on Selected Areas in Telecommunication, vol. 9, No. 8 Oct. 1991, NY, US, pp. 1255-1264, T. R. Banniza et al., Design & Technology Aspects of VLSI's for ATM Switches; p. 1257.
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De Somer Michel P. M.
Henrion Michel A. R.
Pauwels Bart J. G.
Verhille Henri A. J.
ALCATEL N.V.
Ning John
O'Shea Sandra L.
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