Multiplex communications – Communication techniques for information carried in plural... – Assembly or disassembly of messages having address headers
Reexamination Certificate
1999-11-19
2003-07-01
Vincent, David (Department: 2732)
Multiplex communications
Communication techniques for information carried in plural...
Assembly or disassembly of messages having address headers
C370S395700
Reexamination Certificate
active
06587478
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an asynchronous transfer mode (“ATM”) switching system, and more particularly, to a cell interleaving method in an ATM switching system.
2. Background of the Related Art
A basic function of a network is to allow a first subscriber to select a desired one of a plurality of other subscribers, form a circuit connection between the two, and facilitate a free-exchange of information. The switching system for the circuit connection is classified into “circuit switching systems,” “packet switching systems,” and “ATM switching systems.”
The circuit switching system is a system in which a physical circuit is formed between a calling party and a called party. A switch of an exchange is set according to the number of the called party. If there is information to be transmitted to the called party, this system can transmit the information without any delay. If there is no information to be transmitted to the called party, however, the system unnecessarily occupies a circuit over which no information is being transmitted. The circuit switching system is thus applicable to a telephone, a facsimile, or a continual image transmitting device, and so on.
The packet switching system is a system in which digital information is segmented into blocks each having a predetermined size. A header containing an address number is connected to each block, thereby forming the circuit connection. The information resulting from the coupling of the header to the block is called “packet.” Transmission of information thus occurs in a packet unit. Since the system selects an empty circuit to transmit the packet information and transmits only when necessary, the packet switching system is applicable to data communication for intermittent information transmission.
Finally, the ATM switching system is an advanced packet switching system that executes a packet process in a simple manner to achieve a high speed operation similar to that of the circuit switching system. Therefore, the ATM switching system can exchange various kinds of information signals in a free and effective manner, making it is applicable to a next generation communication system based upon multimedia information. The ATM switching system is used in a wire section of a mobile telephone system. For example, it can be implemented between a base station and an exchange, or between the exchange and a base station controller, excepting a radio section between a mobile terminal and the base station.
FIG. 1
is an exemplary view illustrating the basic principles of a related art ATM switching system. As shown, the digital information is segmented into a plurality of blocks, each having a predetermined length of 48 bytes. Upon information transmission, the header of 5 bytes is connected to each block. In the ATM switching system, the resulting block of 53 bytes is called a “cell.”
Under the above construction, if digital information is segmented into cells, each of which is transmitted, the number of cells to be transmitted is configured to be adjustable. Hence, the system can transmit various kinds of information at different transmission rate, without any restriction. In addition, there is no need to synchronize the transmission rate of a network with the transmission rate of an information signal. Moreover, the information is transmitted only when it is generated. Thus, when no information is generated, other terminals may use the same transmission line to transmit other cells, thereby preventing unnecessary monopolization of the transmission line.
Under the ATM switching system described above, cell interleaving is executed to prevent a concentration of errors at a specific portion of the cell upon information transmission. As shown in
FIG. 2
, where data to be transmitted is designated from “1” to “20,” the input is read in a vertical direction and the output is read in a horizontal direction. Therefore, the interleaved data is arranged in the order of data
1
,
6
,
11
, and
16
in the horizontal direction, and is sequentially outputted.
During transmission of data after interleaving, even if all of the data arranged at a second line in a horizontal direction, that is, the data
2
,
7
,
12
,
17
were to become corrupted, the remaining data can be outputted in the form of 1, *, 3, 4, 5, 6, *, 8, 9, 10, . . . , 19, 20. The resulting errors are decentralized. In this case, the entire data can be recovered by using various recovery methods.
FIG. 3
is a block diagram illustrating a related cell interleaving circuit for a cell header in a cell unit in the ATM switching system. As shown, the related cell interleaving is configured to insert a cell header of 40 bits (5 bytes) into an information field of 384 bits (48 bytes) at intervals of 10 bits. The reason for protecting the header through interleaving is that a cell receiving side discards the entire cell if the cell header is broken, irrespective of real data of the cell, thus necessitating cell re-transmission.
Referring to
FIG. 3
, the cell
1
, which comprises the cell header of 40 bits and the information field of 384 bits, is stored in a buffer
2
. Next, each bit of the cell header is inserted into the information field of 384bits at intervals of 10 bits via a converter
3
. Thereafter, the interleaved cell
4
is multiplexed with other cells and is finally transmitted. The cell is then received at the receiving side, which deinterleaves the received cell so as to recover the original data. If the cell header of 5 bytes is broken, the receiving side discards the entire cell and requires cell re-transmission.
The related cell interleaving method is arranged such that all 53 bytes of the cell are stored in a single buffer, and each bit of the cell header is inserted into the information field of 384 bits at intervals of 10 bits. Accordingly, when data is to transmitted, a transmission delay corresponding to the time required for interleaving at least 53 bytes, i.e. one cell, is generated. The transmission delay deteriorates the speech quality in real time-based voice service or video service.
The above description is incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
SUMMARY OF THE INVENTION
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the invention is to reduce cell transmission delay.
Another object of the invention is to improve speech quality in real-time based voice or video service.
In order to achieve at least the above-described objects of the present invention in a whole or in parts, there is provided a method of interleaving cells in an asynchronous transfer mode (ATM) switching system, including the steps of: a) sequentially counting bits constituted for one or more ATM cell having a header field and an information field; b) storing bits corresponding to the header field; c) repeatedly segmenting bits corresponding to the information field in an n bit unit; d) sequentially coupling one bit of the header field stored in step b with 1st to (n−1)th bits in every n bit segment of the segmented information field in step c, and outputting the coupled result; e) transmitting only nth bits which have not been transmitted in the step d to the receiving side in a data unit; and f) transmitting bits which have not been transmitted in steps d and e to the receiving side.
To further achieve the above-described objects of the present invention in a whole or in parts, there is provided an asynchronous transfer mode (ATM) switching system that includes a first buffer for storing a header field of an ATM cell, a first data converter to convert data outputted from the first buffer into a first format, a second data converter to convert nth bits of n bit segments of an information field of the ATM cell into a second format, a second buffer to store bits outputted from the second convert
Fleshner & Kim LLP
LG Information & Communications Ltd.
Vincent David
LandOfFree
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