Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-04-07
2003-04-29
Kizou, Hassan (Department: 2662)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S389000, C370S391000, C370S399000, C370S412000, C370S474000, C370S905000, C709S233000, C709S234000
Reexamination Certificate
active
06556568
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a cell assembly and disassembly (CLAD) device for transferring data having a predetermined communication speed, such as in a voice communication compressed to 8Kbps, and especially relates to a receiving system absorbing cell fluctuation in a CLAD device included in an asynchronous transfer mode (ATM) switching network utilizing cells in a multimedia communication.
As is shown in
FIG. 9
, an ATM switching network is constituted by connecting a plurality of private branch exchange devices (PBX)
30
serving telephones
40
in an opposed manner to an ATM switch (ATM-SW)
20
of an ATM switching network through a cell assembly and disassembly (ATM-CLAD) device
10
.
The ATM-CLAD device
10
is a device for transmitting a bit string of digital data having a predetermined communication speed, such as the voice communication from the PBX
30
, to an ATM switching network by providing a header, and disassembling the data into cells, or receiving cells from the ATM switching network, removing the header, and reassembling a bit string of digital data and sending it out to the PBX
30
.
The voice data from the telephone device
40
a
is converted to a digital data bit string at the PBX
30
a
and then transferred to the ATM-CLAD device
10
a.
At the ATM-CLAD device
10
a,
the digital data bit string is divided at every 48 bytes, provided with a header, assembled into a cell of 53 bytes, and transmitted to the opposing ATM-CLAD device
10
b
through an ATM switch (ATM-SW)
20
.
At the opposing ATM-CLAD device
10
b
, the received cells are disassembled into a digital data bit string, which is transferred to the PBX
30
. The digital data bit string is converted at the PBX
30
b
to a voice data, and is transmitted to a telephone device
40
b.
In an ATM switching network where cells are transmitted by a fixed speed, a fluctuation may occur at the CLAD device when receiving the cells, according to the condition of the transmission path status and the like.
In the prior art ATM switching network, a cell receiving buffer was mounted to the ATM-CLAD device corresponding to the communication speed of the communication opponent, and the received cells were stored in a receiving buffer corresponding to the fluctuation guarantee time, and by sending out the data at a fixed communication speed, the cell fluctuation occurring when transferring data was absorbed.
According to such system, the stored data is sent out when the next cell is received, so it was necessary to receive at least two cells. That is, when sending out received data, a data send-out delay occurs corresponding to the time necessary to receive two cells. The delay of two cells would be approximately 6msec in voice data of 64Kbps, which will be no problem. However, when the voice was compressed by 8 Kbps, a delay of 48 msec occurs, which causes a decline in quality.
Further, in the prior art, communication was started against the communication device after receiving a cell corresponding to the fluctuation guarantee time at the start of communication. However, in a voice communication, the gap of time from receiving the first cell to receiving the second cell was too large when voice is compressed, so fluctuation could be absorbed, but delay of data also occurred. As was explained, in a low speed cell communication, storage by cell units could not be performed.
SUMMARY OF THE INVENTION
The present invention aims at providing a receiving system for absorbing a receiving fluctuation of a cell and minimizing data delay in a low speed transmission by a compression technique and the like in an ATM switching network.
In order to solve the above problem, the present invention provides a system characterized in that when a first cell is received at a start of a communication by the receiving buffer mounted to an ATM-CLAD device equipped in an ATM switching network, dummy data corresponding to a fluctuation guarantee time is stored in the receiving buffer before storing the received data continuously.
Further, the present invention provides a system in an ATM-CLAD device equipped with a buffer corresponding to the communication speed of each of the addresses when disassembling the cells for storing the bit string having a fixed communication speed of a data communication from a connecting communication device, and by a means for storing dummy data in the buffer corresponding to the fluctuation guarantee time before storing the first received cell data, absorbing the fluctuation reception of the cell, and by restoring the cells to a data bit string having a fixed communication speed against the connecting communication device, absorbs the cell fluctuation.
Further, the present invention comprises a control circuit for monitoring the address of the present output to the transmitting data buffer to the connecting communication device at the time of starting the communication or receiving the first cell, and by storing data from the address which is positioned after the fluctuation guarantee time, enabling to start the communication without waiting for the second cell. This leads to the minimization of data delay, and the guarantee of the fluctuation.
According to the present invention, dummy data corresponding to the fluctuation guarantee time is stored in the receiving buffer at the time of receiving the first cell at the start of the communication, so even if fluctuation occurs in the cells received thereafter, delay could be prevented by the existence of this dummy data.
By such characters, even if fluctuation occurs to the received cell, the data corresponding to the dummy data path could be outputted, maintaining the continuity of the data.
Further, according to the present invention, by increasing and decreasing the amount of dummy data, the fluctuation guarantee time and the delay time could be adjusted easily.
REFERENCES:
patent: 5412655 (1995-05-01), Yamada et al.
patent: 5521915 (1996-05-01), Dieudonne et al.
patent: 5541926 (1996-07-01), Saito et al.
patent: 5734653 (1998-03-01), Hiraiwa et al.
patent: 5740173 (1998-04-01), Fiorini
patent: 6021134 (2000-02-01), Hiraiwa et al.
Hitachi Communication Technologies Ltd.
Kizou Hassan
Logsdon Joe
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