Multiplex communications – Wide area network – Packet switching
Patent
1991-11-26
1994-02-08
Chin, Wellington
Multiplex communications
Wide area network
Packet switching
370 942, H04L 1226, H04L 1256
Patent
active
052854469
ABSTRACT:
A cell flow control unit for use in ATM transmission networks is provided with a cell buffer memory circuit for temporarily storing a plurality of ATM cells each of which has a predetermined number of bits and is transmitted at any time interval via either an input virtual path or an input virtual channel in the sequence of their transmission, a timing control circuit for generating first and second timing pulses to define, respectively a first period of a predetermined length and a second period equal in length to an integral multiple of this predetermined length; and a reading pulse control circuit for generating a first pulse sequence to be fed to the cell buffer memory circuit to read the ATM cells out of the cell buffer memory circuit and transferring them to an output virtual path and either an output virtual channel or a self-routing switch, and a second pulse sequences indicating how many times the ATM cells have been read out of the cell buffer memory circuit. It is further provided with an excess cell processing circuit responsive to the first timing pulse for counting the pulses of the second pulse sequence to generate a first count, comparing the first count and a first reference value corresponding to the maximum number of cells which can be transferred within the first period and, when the two values are found identical, initializing the cell buffer memory circuit; another excess cell processing circuit responsive to the second timing pulse for counting the number of the ATM calls to generate a second count, comparing the second count and a second reference value corresponding to the maximum number of cells which can be transferred within the second period, generating a first excess cell detection signal when the two values are found identical, supplying the first excess cell detection signal to the reading pulse control circuit, and controlling the control circuit so as to cause the control circuit to be responsive to the first excess cell detection signal for generating the first and second pulse sequences at time intervals corresponding to the average for the first period of the maximum number of cells which can be transferred within the second period; and still another excess cell processing circuit responsive to the second timing pulse for counting the pulses of the second pulse sequence to generate a third count, comparing the third count and a third reference value corresponding to the maximum number of cells which can be transferred within the second period, generating a second excess cell detection signal when the two values are found identical, and supplying the second excess cell detection signal to the reading pulse processing circuit to stop the generation of the first and second pulse sequences.
REFERENCES:
patent: 4896316 (1990-01-01), Lespagnol et al.
patent: 4914650 (1990-04-01), Sriram
Chin Wellington
NEC Corporation
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