Cell delineation method and cell delineation circuit

Details Cell delineation method and cell delineation circuit Cell delineation method and cell delineation circuit

1991-03-04

1992-10-13

Hoff, Marc

Coded data generation or conversion

Digital code to digital code converters

Serial to parallel

341 94, H03M 900

Patent

active

051554879

ABSTRACT:
In a cell delineation circuit, an input signal is converted into parallel signals, and a plurality of parallel signals (i.e. series of parallel signals) which are shifted one bit by one bit from each other are formed from those parallel signals. CRC (Cyclic Redundancy Check) calculations are executed in parallel for the plurality of parallel signals. A series in which a pattern to be calculated satisfies a CRC rule is determined from results of the CRC calculations, and this series is generated, thereby establishing a cell delineation.

REFERENCES:
patent: 4379286 (1983-04-01), Yokota et al.
patent: 4447804 (1984-05-01), Allen
"Design of Cell Delineation Circuit using Heades Error Control Bits", IEICEJ Technical Report CS-89-70, Nov. 1989.

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