Cell capacitor of a dynamic random access memory and a method of

Details Cell capacitor of a dynamic random access memory and a method of Cell capacitor of a dynamic random access memory and a method of

1989-09-05

1991-05-07

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 38, 437 47, 437 51, 437 60, 437 83, 437 89, 437 99, 437203, 437233, 437235, 437919, H01L 2170

Patent

active

050136798

ABSTRACT:
In a cell capacitor of a dynamic random access memory cell according to the present invention, an insulation film is formed on the surface of a fine trench formed in a silicon semiconductor substrate. A contact hole is formed in the insulation film in a region on the side wall of the trench. A polysilicon film is formed on the side wall of the trench in a hollow-cylindrical shape. A silicon layer is epitaxially and selectively grown on the polysilicon film and on the silicon substrate exposed through the contact hole. The polysilicon film and the silicon layer constitute an information storage electrode. At least the silicon layer of the information storage electrode is electrically connected to a source or a drain region of a transfer transistor of the memory cell. A gate insulation film is formed on the surface of the silicon layer. A counter electrode is formed such that the counter electrode is embedded in the trench.

REFERENCES:
patent: 4734384 (1988-03-01), Tsuchiya
patent: 4761385 (1988-08-01), Pfiester
patent: 4784964 (1988-11-01), Nitayama
patent: 4786954 (1988-11-01), Morie et al.
patent: 4927779 (1990-05-01), Dhong et al.
V. J. Silvestri, "Selective Epitaxial Trench", J. of Electrochem. Soc., Jul. 1988; pp. 1808-1812.
Nakajima et al., "An Isolation-Merged Vertical Capacitor Cell For Large Capacity DRAM", IEDM Technical Digest, pp. 240-243, 1984.
Japanese Patent disclosure (Kokai) No. 61-88554, Morie et al., May 6, 1986.

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