Cell array of semiconductor memory device and method of...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S226000

Reexamination Certificate

active

07616486

ABSTRACT:
A cell array of a flash memory device includes first and second memory block units, and a voltage generator. Each of the first and second memory block units includes a plurality of memory blocks having a plurality of memory cells. The voltage generator outputs a source voltage, a power supply voltage and a positive bias to the first and second memory block units. The first and second memory block units are connected in parallel through a bit line.

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patent: 6381670 (2002-04-01), Lee et al.
patent: 6873561 (2005-03-01), Ooishi
patent: 2002-251885 (2002-09-01), None
patent: 2003-016792 (2003-01-01), None
patent: 1020050101685 (2005-10-01), None
patent: 1020060075361 (2006-07-01), None

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