Cell array of a non-volatile semiconductor memory devices

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Details

357 45, H01L 2968, H01L 2710, H01L 2715

Patent

active

051482460

ABSTRACT:
A cell array of non-volatile memory semiconductor memory device includes a semiconductor substrate having a first conduction type, a first insulating film formed on the semiconductor substrate, and a plurality of active regions formed in the semiconductor substrate, each of the active regions having a second conduction type opposite to the first conduction type. The cell array also includes a plurality of floating gate electrodes formed on the first insulating film, a second insulating film covering the floating gate electrodes, a plurality of control gate electrodes which are formed on the second insulating film and which run above the floating gate electrodes, and bit lines electrically coupled to the active regions. Each of the active regions has a substantially H-shaped surface portion close to adjacent four of the floating gate electrodes.

REFERENCES:
patent: 4839705 (1989-06-01), Tigelaar et al.
patent: 4935791 (1990-06-01), Namaki et al.

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