CDR lock detector with hysteresis

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

Reexamination Certificate

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C331SDIG002

Reexamination Certificate

active

06982604

ABSTRACT:
A lock-detect circuit is configured to detect whether an incoming signal has acquired a lock to a reference signal using a first frequency detect window and to detect whether the incoming signal has lost a previously acquired a lock to the reference signal using a second frequency detect window different from the first frequency detect window. The two signals are applied to two different down-counters that are first synchronized before initiating the count-downs. If the offset between the counts of the two counters is less than the first frequency detect window, the incoming signal is detected as having acquired a lock to the reference signal. If the offset between the counts of the two counters is greater than the second frequency detect window, the incoming signal is detected as having lost its previously acquired lock to the reference signal.

REFERENCES:
patent: 6314150 (2001-11-01), Vowe
patent: 6621352 (2003-09-01), Matsumoto et al.
patent: 6833763 (2004-12-01), Chung

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