CDMA receiver and method of operation

Details CDMA receiver and method of operation CDMA receiver and method of operation

1998-07-10

2002-04-09

Ton, Dang (Department: 2732)

Multiplex communications

Communication over free space

Combining or distributing information via code word channels...

Reexamination Certificate

active

06370133

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to receivers, and in one embodiment, to a dual mode CDMA/AMPS wireless receiver capable of accurately processing CDMA signals in the presence of AMPS interferers.
In the field of telecommunications, Direct Sequence (DS) Code Division Multiple Access (CDMA) transmission is a popular form of communication because a large number of users may communicate over the same frequency band without interference. In DS-CDMA systems, data is transmitted to an intended recipient by initially generating an address corresponding to the data which is to be transmitted. The address is then combined with a unique pseudo-random bit sequence (PN sequence) to form a combined waveform. The pseudo random sequence causes the combined waveform to appear highly uncorrelated, i.e., unpredictable. The combined waveform is then modulated onto a particular carrier frequency, ranging from 1931.25 MHz-1988.75 MHz in the PCS-band systems or in the frequency range of 869.04 MHz-893.97 MHz in the cellular-band systems. Although many users have access to the signals within a particular frequency band (typically 1.23 MHz wide), none can decipher the combined waveform since it appears to be random. Only the intended recipient is able to decode the combined waveform since his receiver alone produces the same PN sequence used to encode the data within the transmitter.
The transmitted data typically consists of two orthogonally-phased data streams (I and Q data) which are interleaved onto a single data stream prior to transmission. The orthogonal orientation between the I and Q data allows the compilation and transmission of the two data streams without interference between them. The modulated data stream is subsequently transmitted as “chips” to the receiver. The receiver removes the modulation and separates the original I and Q data from the single data stream.
FIG. 1
illustrates a typical receiver for the reception of the orthogonal DS-CDMA signals. The CDMA receiver
100
includes an RF amplifier
110
, a downconverter
120
, an automatic gain control amplifier (AGC)
130
, a baseband conversion circuit
140
, baseband analog filters
152
and
154
, and I and Q channel analog to digital converters (ADCs)
162
and
164
. Analog circuitry is shown in white, and digital circuitry is shown in gray.
During reception, A CDMA signal
102
is received by an electromagnetic collecting apparatus such as an antenna (not shown) and supplied to the CDMA receiver
100
. The RF amplifier
110
, typically a low noise amplifier (LNA), is used to increase the amplitude of the CDMA signal
102
. A downconverter
120
is used to convert the input signal
105
to an IF signal
125
of lower frequency which the subsequent circuitry can process. The downconverter may consist of a single or multiple downconversion stages to frequency translate the RF signal to its final IF frequency.
The IF signal
125
is supplied to the AGC circuit
130
which provides variable signal gain to account for the varying distances over which the received signal may propagate. The AGC circuit
130
can be controlled via a gain control signal
132
to provide attenuation or gain in varying degrees, producing an AGC output signal
134
. The AGC circuit
130
typically provides a sufficient amount of gain or attenuation so that the amplitude level of the I and Q signals supplied to the analog to digital converters (ADCs)
162
and
164
is within an optimum input power range.
A baseband conversion circuit
140
, typically an analog quadrature downconverter circuit, is used to extract the I and Q data from the AGC output signal
134
, producing I and Q channel baseband signals
142
and
144
. This process typically involves frequency translating the AGC output signal
134
to lower frequency I and Q baseband signals
142
and
144
as well.
The I and Q channel analog filters
152
and
154
are used to filter out any out-of-band signals prior to the ADCs
162
and
164
. Additional filtering
127
may be required within the receiver
100
to achieve the necessary out-of-band rejection.
The I and Q analog filters
152
and
154
are also designed to have precise group delay response. Prior to transmission, the phase of the CDMA signal is pre-distorted for optimum signal transmission. In order for the I and Q data to be properly reconstructed at the receiver output, the phase response over the communication channel (i.e., between the transmitter input and the receiver output) should be near linear. Thus, the analog filters
152
and
154
must be designed to provide a specific phase response which, when combined with the filters used within the CDMA transmitter (not shown) is a particular value.
Additionally, the I and Q channel analog filters
152
and
154
must be closely matched to provide substantially identical amplitude and phase responses. The close amplitude and phase matching ensures that the I and Q channel data are equally affected by the filtering stage. The analog filters
152
and
154
are typically realized in switched capacitor form and may be fabricated in IC form or from discrete components.
I and Q channel ADCs
162
and
164
receive the filtered I and Q baseband signals, converting the signals to I and Q channel data
172
and
174
, respectively. Two DC offset voltages
175
a
and
175
b
are supplied to the ADCs
172
and
174
to correct for the DC voltage level superimposed on the filtered baseband signals
142
and
144
as a side-effect of the downconversion and analog to digital (A-D) conversion process. The I and Q channel data
172
and
174
is then fed into I and Q channel correlators (not shown) to determine the degree of correlation with the receiver's address code.
One disadvantage of the conventional CDMA receiver is its inability to reject correlated interfering signals. One such type of signal is generated from the Advanced Mobile Telephone System (AMPS), also commonly used in cellular telephony today. The AMPS system is an analog Frequency Division Multiple Access (FDMA) system in which data is communicated using frequency modulation (FM). Each user is allocated a particular carrier bandwidth, typically 30 KHz, which carries that user's transmissions. The AMPS signals are narrow band (30 KHz) compared to the CDMA signals (1.23 MHz) and are highly correlated.
Unfortunately, the AMPS system transmits its FM signals within the CDMA receiver band, 869.04 MHz-893.97 MHz. When the AMPS and CDMA signals
102
and
104
are both received by a non-linear device, such as the RF amplifier
105
within the CDMA receiver, a two-tone third order intermodulation product or “AMPS interferer” can be produced at the amplifier's output which is within the CDMA receivers band. Once within the CDMA receiver's band, the AMPS interferer can propagate as a false CDMA signal, causing erroneous data output and signal distortion. The inability of the conventional CDMA receiver to operate in environments where AMPS or other highly correlated signals propagate severely limits the use and operability of the conventional CDMA receiver.
Another disadvantage of the conventional CDMA receiver is the high cost and marginal performance associated with the I and Q channel analog filters
152
and
154
. The I and Q channel analog filters
152
and
154
are needed to provide rejection of the out-of-band signals and add phase correction to the incoming signal. Additionally, the I and Q channel analog filters
152
and
154
must be closely matched to each other. If fabricated from discrete components, each of the analog filters
152
and
154
would require an extensive amount of time and labor to tune and test, and represents a significant cost factor of the CDMA receiver.
Alternatively, the analog filters
152
and
154
may be fabricated in integrated circuit (IC) form using Bipolar-CMOS (Bi-CMOS) technology. Bi-CMOS IC processing allows for the fabrication of analog and digital circuitry on the same IC die. Using this IC process, the analog filters can be fabricated in IC form withou

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