CDMA receiver

Details CDMA receiver CDMA receiver

2001-08-29

2003-11-18

Ghebretinsae, Temesghen (Department: 2631)

Pulse or digital communications

Spread spectrum

Direct sequence

C370S342000, C370S335000

Reexamination Certificate

active

06650692

ABSTRACT:

TECHNICAL FIELD
This invention relates to a CDMA receiver for direct sequence spread spectrum communications (hereafter “DS”), and more particularly to a CDMA receiver which can be synchronized with a reference timing.
BACKGROUND ART
Development of digital cellular wireless communication systems employing DS-CDMA (direct sequence code division multiple access) technology is being developed as a next-generation mobile communication system to achieve wireless multimedia communication. In this CDMA communication, a plurality of channels or information for transmission by the user is multiplexed by means of spreading codes, and is transmitted via wireless circuits or other transmission routes.
In mobile communications, random changes in amplitude and phase known as fading occur, having a maximum frequency determined by the velocity of the mobile object and the carrier wave frequency. Because of this, stable reception is extremely difficult compared with fixed wireless communication. Spread spectrum communication methods are effective as a means of reducing the degradation caused by the effects of such frequency-selective fading. Because signals in a narrow band are spread over a high-frequency band for transmission, even if a drop in received electric field intensity occurs in a specific frequency region, information can be restored without errors from other bands.
Further, when in mobile communications fading similar to that described above occurs due to the environment in the vicinity of the receiver caused by delayed waves resulting from distant tall buildings, mountains and similar, a multi-path fading environment results. When using DS, these delayed waves become interference waves with respect to spreading codes, and so induce degradation of reception characteristics. The RAKE reception method is known as one method which can be used to effectively improve characteristics with respect to these delayed waves. In this method, despreading is performed for each delayed wave arriving via each of the multiple paths, the respective delay times are arranged, and combining is performed by weighting according to the reception level and adding.
FIG. 23
is an example of the configuration of a CDMA wireless device of the prior art;
1
is the transmission circuit,
2
is the reception circuit,
3
is a duplexer which sends transmission signals to the antenna and inputs reception signals to the reception circuit, and
4
is the antenna. In the transmission circuit
1
,
1
a
is an encoder which encodes transmission signals (transmission data), and
1
b
is a mapping unit; for example, frame data (pilot signal and transmission data) is divided, alternating for each bit, into two series, I symbol data D
I
, which is the same-phase component (I or in-phase component), and Q symbol data D
Q
, which is the orthogonal component (Q or quadrature component).
1
c
and
1
d
are spreaders which perform spreading modulation on the I symbol data and Q symbol data D
I
, D
Q
using prescribed spreading codes;
1
e
and
1
f
are waveform-shaping filters;
1
g
and
1
h
are D/A converters which perform D/A conversion of the output of the filters
1
e,
if;
1
i
is a quadrature modulation circuit which executes QPSK quadrature modulation of the I channel signal and Q channel signal and outputs the results; and
1
j
is a wireless unit which performs frequency conversion from IF to RF, high-frequency amplification, and other operations.
In the reception circuit
2
,
2
a
is a wireless unit which performs frequency conversion from RF to IF, high-frequency amplification, and other operations;
2
b
is a quadrature detection circuit which uses orthogonal detection to demodulate the I channel and Q channel signals;
2
c
and
2
d
are A/D converters which convert the I channel and Q channel signals into digital data;
2
e
is a path search circuit which searches for multiple paths;
2
f
is a RAKE combining/demodulation unit which executes despreading for each of multiple paths, demodulates the the I symbol data D
I
′ and Q symbol data D
Q
′ obtained by despreading into the original data, and combines and outputs the demodulation results; and
2
g
is a decoder.
FIG. 24
is a schematic diagram of the path search unit
2
e
and RAKE combining/demodulation unit
2
f.
The RAKE combining/demodulation unit
2
f
has finger units
5
1
,
5
2
,
5
3
provided for each path of multiple paths, and a RAKE combining unit
6
which combines the outputs of the finger units. The path search unit
2
e
comprises a matched filter (MF)
7
a,
an integration circuit
7
b,
a path selection section
7
c,
and a timing generation section
7
d;
multiple paths are detected, the time delays from the arrival times of signals arriving via each path among multiple paths, or from a reference time, are discriminated, and the timing data P
1
to P
3
for start of despreading for the finger units corresponding to each path, and time delay adjustment data D
1
to D
3
, are input.
The reception level for signals sent from a transmitter vary according to the path among multiple paths as shown in
FIG. 25
, and also differ for different times of arrival at the receiver. The matched filter
7
a
outputs the auto-correlation of the desired signal contained in the reception signal. Because channel components other than the channel allocated to a matched filter
7
a
are also contained in the reception output of the antenna
4
, the matched filter
7
a
uses the spreading code for its own channel to extract the signal component for its own channel (the desired signal) from the antenna reception signal, and outputs the result. In this case, the correlation values I, Q of the I channel signal and the Q channel signal are obtained independently, so that for example the calculation (I+jQ) (I−jQ)=I
2
+Q
2
is performed to convert to a power value, which is output.
That is, when direct-sequence signals (DS signals) which have been affected by multiple paths enter the matched filter
7
a,
a pulse train is output which has a plurality of peaks corresponding to the arrival time delay and the received electric field intensity; after passing through the integration circuit
7
b,
this pulse train enters the path selection section
7
c.
In order to remedy the loss due to instantaneous level drops caused by fading, the integration circuit
7
b
takes a time average of the matched filter output, and inputs the result to the path selection section
7
c.
The path selection section
7
c
refers to the integration output (
FIG. 25
) of the integration circuit, detects multiple paths based on the multiple path signals MP
1
, MP
2
, MP
3
which are greater than a threshold value, detects each of the paths of the multiple paths and the time delays t
1
, t
2
, t
3
, and inputs, to the finger units
5
1
,
5
2
,
5
3
corresponding to each path, the timing data for start of despreading P
1
, P
2
, P
3
and the time delay adjustment data D
1
, D
2
, D
3
. The multipath signals MP
1
, MP
2
, MP
3
are arranged in order of magnitude, and the path with the largest multipath signal is allocated to the first finger
5
1
, while the path with the second-largest multipath signal is allocated to the second finger
5
2
, and the path with the third-largest multipath signal is allocated to the third finger
5
3
; the processing described below is then performed on signals arriving via the paths assigned to each of these finger units.
The finger units
5
1
,
5
2
,
5
3
corresponding to the paths have the same configuration, each having a despreading circuit
5
a,
demodulation circuit
5
b,
and delay circuit
5
c.
Each of the despreading circuits
5
a
uses the spreading code for its own channel to perform despreading processing of the received I channel signal and Q channel signal, with timing (P
1
to P
3
) indicated by the path search unit
2
e.
The demodulation circuit
5
b
uses the I symbol data D
I
′ and Q symbol data D
Q
′, obtained from despreading, to demodulate to obtain the original data; the delay circuit

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