Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
2000-05-17
2001-07-24
Pham, Chi (Department: 2631)
Pulse or digital communications
Spread spectrum
Direct sequence
C370S342000, C370S441000
Reexamination Certificate
active
06266365
ABSTRACT:
BACKGROUND AND FIELD OF THE INVENTION
The present invention relates to a receiver for use with CDMA (code division multiple access) communication.
Direct sequence code division multiple access (DS-CDMA) is a technique for digital communications used particularly in cellular mobile communications. In this technique, a data signal is combined with a spreading waveform in the form of a pseudo random noise code (PN) to form a coded signal for transmission. The code has a frequency (the chip rate) which is a multiple of the frequency (the bit or symbol rate) of the data signal, so that an effect of combination of the data signal and spreading waveform is that the bit period is divided into smaller chip periods.
At the receiver, the processed signal is combined with the same spreading waveform to extract the data signal. The technique provides a high data capacity by spreading signal energy over a wide bandwidth to increase bandwidth utilization and reduce the effects of narrow band interference.
DS-CDMA requires that the spreading waveforms generated by transmitter and receiver are synchronized. If these two waveforms are out of synchronization by as little as one chip period, reliable communication cannot be achieved. The problem of synchronization is exacerbated by multipath effects, since the wireless channel from base station to mobile station is composed of several paths of different time delays, which vary due to the movement of the mobile station or Doppler shift effects.
A searcher formed by parallel correlators or matched filters is used to deal with rapid path changes caused principally by movement, while a plurality of Delay Locked Loops (DLL) are used to deal with slight changes in the phase of the spreading waveform caused principally by basic synchronization clock errors between transmitter and receiver or Doppler shift. Each path will have a corresponding portion of the receiver apparatus termed a “finger” including a DLL which keeps close track of phase fluctuations of the received signal from that path and adjusts its respective locally generated spreading waveform to follow the fluctuations.
DS-CDMA systems need to use an analogue to digital converter to sample and thus recover the received signal. In current systems, the converter includes a clock having a sampling rate of eight times the chip rate (CHIP8CLK). Each DLL uses this clock as a basis to adjust and align the phase of its locally generated spreading waveform. The smallest step of advance or retardation of the DLL's spreading waveform is thus ⅛ of the chip duration (Tc). Therefore, if the DLL works under perfect control, the timing error of each finger in tracking between the incoming and locally generated spreading waveforms is less than {fraction (1/16)} Tc and the bit error rate (BER) performance degradation due to this error is negligible. However, if the sampling rate of the clock is reduced, performance degradation will increase to the point where reliable communication cannot be achieved.
In order to obtain higher capacity and support multimedia applications, systems using wide band code division multiple access (WCDMA) have been proposed. Such systems use a relatively wider band than the systems discussed above. However, operating in a wide band environment requires a corresponding increase in chip rate. This in turn requires a correspondingly faster sampling clock, which considerably increases cost and power consumption, since several internal modules operate under control of the clock.
It is an object of the invention to provide signal processing apparatus which alleviates this problem.
SUMMARY OF THE INVENTION
According to the invention there is provided a code division multiple access (CDMA) receiver for receiving an encoded CDMA signal, the receiver comprising an analog to digital converter for sampling the received signal and passing the thus sampled and digitized signal to CDMA decoding means, the converter receiving a sampling clock signal at a sampling frequency, the phase of the clock signal being adjustable.
Preferably, the decoding means is arranged to correlate the signal with spreading waveforms of different delays, to generate an error signal from the correlated signals and to generate a signal to adjust the phase of the clock signal in dependence upon the error signal. The decoding means may comprise a plurality of sets of correlators, the arrangement being such that a first correlator of each set receives a spreading waveform of a different base delay and second and third correlators of each set receive spreading waveforms which respectively lead and lag the base delay of the first correlator and the arrangement may be such that an error signal component for each set is derived from the outputs of the correlators of each set, the components from all the sets being summed to form the error signal.
Preferably a measure of the power of the output from the second correlator is subtracted from a measure of the power of the output of the third correlator to provide the error signal component, the phase of the clock signal being advanced if the error signal is positive and retarded if the error signal is negative. Preferably the phase of the clock signal is adjusted only when the magnitude of the error signal exceeds a first threshold.
The base delay may be adjustable and preferably the base delay is adjustable towards the dominant power of the outputs from the correlators of the set.
More preferably, the base delay is not adjusted when a measure of the power of the output from the first correlator is larger than a measure of the power of the outputs of either the second or third correlators by more than a second threshold. If the measure of the power of the output from the first correlator is smaller than the larger of the measures of the powers of the outputs of the second and third correlators by more than a third threshold then if the measure of the power of the output of the second correlator is larger than the measure of the power of the output of the third correlator, the phase of the base delay is advanced else the phase is retarded. If the measure of the power of the output from the first correlator is not smaller than the larger of the measures of the powers of the outputs of the second and third correlators by more than the third threshold and if the measure of the power of the output of the second correlator is larger than the measure of the power of the output of the third correlator then if the phase of the clock signal is to be retarded, then the phase of the base delay is advanced else the phase of the base delay is left unchanged. If the measure of the power of the output from the first correlator is not smaller than the larger of the measures of the powers of the outputs of the second and third correlators by more than the third threshold and if the measure of the power of the output of the third correlator is larger than the measure of the power of the output of the second correlator then if the phase of the clock signal is to be advanced, then the phase of the base delay is retarded else the phase of the base delay is left unchanged. Preferably the second and third thresholds are the same.
The described embodiment of the invention provides signal processing apparatus which allows the use of a lower sampling frequency, for example twice the chip rate (CHIP2CLK), while still providing acceptable communication reliability. In order to compensate for errors derived from the lower sampling rate, firstly adjustments are made to the phase of the clock signal for sampling the received signal and secondly a new algorithm is applied to adjust the phase of the clock signal used by each DLL for generating its local spreading waveform. In this context, adjustment of phase means change in the position of the leading edge of the clock waveform. It does not mean change of frequency of that waveform, which can be realized by automatic frequency control (AFC). With these adjustments, a preferred sampling point for the received signal may be established.
REFERENCES:
pate
Ito Noriyoshi
Sugimoto Hiroki
Wang Zhaocheng
Zhang Tao
Corrielus Jean B.
Frank Robert J.
Oki Techno Centre
Pham Chi
Venable
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